MT46V16M16TG-5BLIT Micron Technology Inc, MT46V16M16TG-5BLIT Datasheet - Page 53

• Manufacturer Part Number: MT46V16M16TG-5BLIT
• Manufacturer: Micron Technology Inc

Specifications of MT46V16M16TG-5BLIT

• Lead Free Status / Rohs Status: Not Compliant

PRECHARGE (PRE)
Figure 20:
BURST TERMINATE (BST)
AUTO REFRESH (AR)
SELF REFRESH
PDF: 09005aef80768abb/Source: 09005aef82a95a3a
DDR_x4x8x16_Core2.fm - 256Mb DDR: Rev. O, Core DDR: Rev. B 1/09 EN
PRECHARGE Command
Notes:
The PRECHARGE command is used to deactivate the open row in a particular bank or
the open row in all banks as shown in Figure 20. The value on the BA0, BA1 inputs selects
the bank, and the A10 input selects whether a single bank is precharged or whether all
banks are precharged.
BA0, BA1
1. If A10 is HIGH, bank address becomes “Don’t Care.”
The BURST TERMINATE command is used to truncate READ bursts (with auto
precharge disabled). The most recently registered READ command prior to the BURST
TERMINATE command will be truncated, as shown in “Operations” on page 52. The
open page from which the READ burst was terminated remains open.
AUTO REFRESH is used during normal operation of the DDR SDRAM and is analogous
to CAS#-before-RAS# (CBR) refresh in FPM/EDO DRAMs. This command is nonpersis-
tent, so it must be issued each time a refresh is required. All banks must be idle before an
AUTO REFRESH command is issued.
The SELF REFRESH command can be used to retain data in the DDR SDRAM, even if the
rest of the system is powered down. The SELF REFRESH command is initiated like an
AUTO REFRESH command except CKE is disabled (LOW).
Self refresh is not supported on automotive temperature (AT) devices.
Address
RAS#
CAS#
WE#
CK#
CKE
A10
CS#
CK
HIGH
One bank
All banks
Bank1
Don’t Care
51
Micron Technology, Inc., reserves the right to change products or specifications without notice.
256Mb: x4, x8, x16 DDR SDRAM
©2003 Micron Technology, Inc. All rights reserved.
Commands