N25Q128A11B1240E NUMONYX, N25Q128A11B1240E Datasheet - Page 80
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N25Q128A11B1240E
Manufacturer Part Number
N25Q128A11B1240E
Description
Manufacturer
NUMONYX
Datasheet
1.N25Q128A11B1240E.pdf
(185 pages)
Specifications of N25Q128A11B1240E
Cell Type
NOR
Density
128Mb
Access Time (max)
7ns
Interface Type
Serial (SPI)
Boot Type
Bottom
Address Bus
1b
Operating Supply Voltage (typ)
1.8V
Operating Temp Range
-40C to 85C
Package Type
TBGA
Program/erase Volt (typ)
1.7 to 2/8.5 to 9.5V
Sync/async
Synchronous
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
1.7V
Operating Supply Voltage (max)
2V
Word Size
8b
Number Of Words
16M
Supply Current
20mA
Mounting
Surface Mount
Pin Count
24
Lead Free Status / Rohs Status
Supplier Unconfirmed
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Table 16.
Table 17.
Figure 10. Read identification instruction and data-out sequence
9.1.2
80/185
20h
Reserved Reserved Reserved
Bit 7
Manufacturer
Identification
Read Identification data-out sequence
Extended Device ID table (first byte)
Read Data Bytes (READ)
The device is first selected by driving Chip Select (S) Low. The instruction code for the Read
Data Bytes (READ) instruction is followed by a 3-byte address (A23-A0), each bit being
latched-in during the rising edge of Serial Clock (C). Then the memory contents, at that
address, is shifted out on Serial Data output (DQ1), each bit being shifted out, at a
maximum frequency fR, during the falling edge of Serial Clock (C).
The first byte addressed can be at any location. The address is automatically incremented
to the next higher address after each byte of data is shifted out. The whole memory can,
therefore, be read with a single Read Data Bytes (READ) instruction. When the highest
address is reached, the address counter rolls over to 000000h, allowing the read sequence
to be continued indefinitely.
The Read Data Bytes (READ) instruction is terminated by driving Chip Select (S) High. Chip
Select (S) can be driven High at any time during data output. Any Read Data Bytes (READ)
instruction, while an Erase, Program or Write cycle is in progress, is rejected without having
any effects on the cycle that is in progress.
Bit 6
Memory type
BBh
Bit 5
Device identification
VCR XIP bit setting:
0 = required,
1 = not required
Memory capacity
18h
Bit 4
Hold/Reset function:
0 = HOLD,
1 = Reset
EDID+CFD length
10h
Bit 3
Addressing:
0 = by Byte,
EDID
2 bytes
Bit 2
UID
Architecture:
00 = Uniform,
01 = Bottom,
11 = Top
CFD
14 bytes
Bit 1
Bit 0
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