M25PX16-VMW6G Micron Technology Inc, M25PX16-VMW6G Datasheet - Page 23

• Manufacturer Part Number: M25PX16-VMW6G
• Manufacturer: Micron Technology Inc

Specifications of M25PX16-VMW6G

• Cell Type: NOR
• Density: 16Mb
• Access Time (max): 8ns
• Interface Type: Serial (SPI)
• Boot Type: Not Required
• Address Bus: 1b
• Operating Supply Voltage (typ): 2.5/3.3V
• Operating Temp Range: -40C to 85C
• Package Type: SO W
• Sync/async: Synchronous
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 2.3V
• Operating Supply Voltage (max): 3.6V
• Word Size: 8b
• Number Of Words: 2M
• Supply Current: 12mA
• Mounting: Surface Mount
• Pin Count: 8
• Lead Free Status / Rohs Status: Compliant

6.1
Table 5.
Write Enable (WREN)
The Write Enable (WREN) instruction
The Write Enable Latch (WEL) bit must be set prior to every Page Program (PP), Dual Input
Fast Program (DIFP), Program OTP (POTP), Write to Lock Register (WRLR), Subsector
Erase (SSE), Sector Erase (SE), Bulk Erase (BE) and Write Status Register (WRSR)
instruction.
The Write Enable (WREN) instruction is entered by driving Chip Select (S) Low, sending the
instruction code, and then driving Chip Select (S) High.
Figure 8.
Instruction
ROTP
POTP
DIFP
RDP
SSE
PP
SE
BE
DP
Instruction set
Write Enable (WREN) instruction sequence
Read OTP (Read 64 bytes of
OTP area)
Program OTP (Program 64
bytes of OTP area)
Page Program
Dual Input Fast Program
Subsector Erase
Sector Erase
Bulk Erase
Deep Power-down
Release from Deep Power-
down
S
C
DQ0
DQ1
Description
High Impedance
0
(Figure
1
2
One-byte instruction
Instruction
0100 0010
0000 0010
1010 0010
0010 0000
0100 1011
1101 1000
1011 1001
1010 1011
1100 0111
3
8) sets the Write Enable Latch (WEL) bit.
4
code
5
6
7
D8h
C7h
ABh
4Bh
A2h
B9h
42h
02h
20h
Address
AI13731
bytes
3
3
3
3
3
3
0
0
0
Dummy
bytes
1
0
0
0
0
0
0
0
0
1 to 256
1 to 256
1 to 65
1 to 65
bytes
Data
0
0
0
0
0
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