72T36115L4-4BBG Integrated Device Technology (Idt), 72T36115L4-4BBG Datasheet - Page 9

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72T36115L4-4BBG

Manufacturer Part Number
72T36115L4-4BBG
Description
FIFO Mem Async/Sync Dual Depth/Width Uni-Dir 128K x 36 240-Pin BGA
Manufacturer
Integrated Device Technology (Idt)
Datasheet

Specifications of 72T36115L4-4BBG

Package
240BGA
Configuration
Dual
Bus Directional
Uni-Directional
Density
4.5 Mb
Organization
128Kx36
Data Bus Width
36 Bit
Timing Type
Asynchronous|Synchronous
Expansion Type
Depth|Width
Typical Operating Supply Voltage
2.5 V
Operating Temperature
0 to 70 °C
NOTES:
1. Inputs should not change state after Master Reset.
2. These pins are for the JTAG port. Please refer to pages 31-34 and Figures 6-8.
IDT72T3645/55/65/75/85/95/105/115/125 2.5V TeraSync™ ™ ™ ™ ™ 36-BIT FIFO
1K x 36, 2K x 36, 4K x 36, 8K x 36, 16K x 36, 32K x 36, 64K x 36, 128K x 36 and 256K x 36
WHSTL
Vcc
GND
Vref
V
PIN DESCRIPTION (CONTINUED)
Symbol
DDQ
(1)
Write Port HSTL
Select
+2.5v Supply
Ground Pin
Reference
Voltage
O/P Rail Voltage
Name
I/O TYPE
LVTTL
INPUT
I
I
I
I
This pin is used to select HSTL or 2.5V LVTTL inputs for the FIFO. If HSTL inputs are required, this input must
be tied HIGH. Otherwise it should be tied LOW.
These are Vcc supply inputs and must be connected to the 2.5V supply rail.
These are Ground pins an dmust be connected to the GND rail.
This is a Voltage Reference input and must be connected to a voltage level determined from the table,
“Recommended DC Operating Conditions”. This provides the reference voltage when using HSTL class
inputs. If HSTL class inputs are not being used, this pin should be tied LOW.
This pin should be tied to the desired voltage rail for providing power to the output drivers.
9
Description
COMMERCIAL AND INDUSTRIAL
TEMPERATURE RANGES
FEBRUARY 4, 2009

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