LCMXO640C-3MN132C Lattice, LCMXO640C-3MN132C Datasheet - Page 23

• Manufacturer Part Number: LCMXO640C-3MN132C
• Description: CPLD MachXO Family 320 Macro Cells 1.8V/2.5V/3.3V 132-Pin CSBGA Tray
• Manufacturer: Lattice
• Series: MachXOr

Specifications of LCMXO640C-3MN132C

• Package: 132CSBGA
• Family Name: MachXO
• Number Of Macro Cells: 320
• Maximum Propagation Delay Time: 4.9 ns
• Number Of User I/os: 101
• Typical Operating Supply Voltage: 1.8|2.5|3.3 V
• Memory Type: SRAM
• Operating Temperature: 0 to 85 °C
• Programmable Type: In System Programmable
• Delay Time Tpd(1) Max: 4.9ns
• Voltage Supply - Internal: 1.71 V ~ 3.465 V
• Number Of Logic Elements/blocks: -
• Number Of Macrocells: 320
• Number Of Gates: -
• Number Of I /o: 101
• Mounting Type: *
• Package / Case: *
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Lattice Semiconductor
Figure 2-20. MachXO640 Banks
Figure 2-21. MachXO256 Banks
Hot Socketing
The MachXO devices have been carefully designed to ensure predictable behavior during power-up and power-
down. Leakage into I/O pins is controlled to within specified limits. This allows for easy integration with the rest of
V
V
GND
GND
CCO1
CCO3
40
1
1
1
1
1
Bank 1
Bank 0
Bank 2
2-20
Bank 0
37
40
42
37
41
1
MachXO Family Data Sheet
V
V
GND
CCO1
GND
CCO0
Architecture