LCMXO640C-3MN132C Lattice, LCMXO640C-3MN132C Datasheet - Page 32

• Manufacturer Part Number: LCMXO640C-3MN132C
• Description: CPLD MachXO Family 320 Macro Cells 1.8V/2.5V/3.3V 132-Pin CSBGA Tray
• Manufacturer: Lattice
• Series: MachXOr

Specifications of LCMXO640C-3MN132C

• Package: 132CSBGA
• Family Name: MachXO
• Number Of Macro Cells: 320
• Maximum Propagation Delay Time: 4.9 ns
• Number Of User I/os: 101
• Typical Operating Supply Voltage: 1.8|2.5|3.3 V
• Memory Type: SRAM
• Operating Temperature: 0 to 85 °C
• Programmable Type: In System Programmable
• Delay Time Tpd(1) Max: 4.9ns
• Voltage Supply - Internal: 1.71 V ~ 3.465 V
• Number Of Logic Elements/blocks: -
• Number Of Macrocells: 320
• Number Of Gates: -
• Number Of I /o: 101
• Mounting Type: *
• Package / Case: *
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Lattice Semiconductor
sysIO Recommended Operating Conditions
LVCMOS 3.3
LVCMOS 2.5
LVCMOS 1.8
LVCMOS 1.5
LVCMOS 1.2
LVTTL
PCI
LVDS
LVPECL
BLVDS
RSDS
1. Inputs on chip. Outputs are implemented with the addition of external resistors.
2. MachXO1200 and MachXO2280 devices have dedicated LVDS buffers
3. Input on the top bank of the MachXO1200 and MachXO2280 only.
3
Standard
1, 2
1
1
1
3.135
2.375
1.425
3.135
3.135
2.375
3.135
2.375
2.375
Min.
1.71
1.14
3-6
V
CCIO
Typ.
3.3
2.5
1.8
1.5
1.2
3.3
3.3
2.5
3.3
2.5
2.5
(V)
DC and Switching Characteristics
MachXO Family Data Sheet
3.465
2.625
1.575
3.465
3.465
2.625
3.465
2.625
2.625
Max.
1.89
1.26