C8051F336-GMR Silicon Laboratories Inc, C8051F336-GMR Datasheet - Page 30
![Microcontrollers (MCU) 16KB 10ADC 10DAC 768Ram MCU Lead Free](/photos/16/2/160285/qfn-20_sml.jpg)
C8051F336-GMR
Manufacturer Part Number
C8051F336-GMR
Description
Microcontrollers (MCU) 16KB 10ADC 10DAC 768Ram MCU Lead Free
Manufacturer
Silicon Laboratories Inc
Datasheet
1.C8051F336-GM.pdf
(226 pages)
Specifications of C8051F336-GMR
Processor Series
C8051F3x
Core
8051
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
16 KB
Data Ram Size
768 B
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
17
Number Of Timers
4
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
QFN-20
3rd Party Development Tools
KSK-SL-TOOLSTICK, PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F336DK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
On-chip Dac
10 bit
Package
20QFN
Device Core
8051
Family Name
C8051F336
Maximum Speed
25 MHz
Ram Size
768 Byte
Operating Temperature
-40 to 85 °C
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051F336-GMR
Manufacturer:
SILICON
Quantity:
100
Part Number:
C8051F336-GMR
Manufacturer:
SILICON LABS/芯科
Quantity:
20 000
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- Download datasheet (2Mb)
C8051F336/7/8/9
Table 6.4. Reset Electrical Characteristics
–40 to +85 °C unless otherwise specified.
Table 6.5. Flash Electrical Characteristics
V
30
Parameter
RST Output Low Voltage
RST Input Low Voltage
RST Input Pullup Current
V
Missing Clock Detector Time-
out
Reset Time Delay
Minimum RST Low Time to
Generate a System Reset
V
V
Parameter
Flash Size
Endurance
Erase Cycle Time
Write Cycle Time
Note: 512 bytes at addresses 0x3E00 to 0x3FFF are reserved.
DD
DD
DD
DD
= 2.7 to 3.6 V;
POR Threshold (V
Monitor Turn-on Time
Monitor Supply Current
–
40 to +85 ºC unless otherwise specified.
RST
Conditions
25 MHz System Clock
25 MHz System Clock
)
Conditions
I
V
RST = 0.0 V
Time from last system clock
rising edge to reset initiation
Delay between release of any
reset source and code
execution at location 0x0000
OL
DD
= 8.5 mA,
= 2.7 V to 3.6 V
Rev.1.0
16384*
20 k
Min
10
40
2.40
Min
100
100
15
—
—
—
—
—
100 k
Typ
15
55
—
2.55
Typ
220
50
20
—
—
—
—
—
Max
20
70
—
—
Max
2.70
100
600
0.6
0.6
40
40
—
—
Erase/Write
Units
bytes
ms
µs
Units
µA
µA
µs
µs
µs
µs
V
V
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