EPM3064ATC100-10N Altera, EPM3064ATC100-10N Datasheet - Page 20

IC MAX 3000A CPLD 64 100-TQFP

EPM3064ATC100-10N

Manufacturer Part Number
EPM3064ATC100-10N
Description
IC MAX 3000A CPLD 64 100-TQFP
Manufacturer
Altera
Series
MAX® 3000Ar
Datasheet

Specifications of EPM3064ATC100-10N

Programmable Type
In System Programmable
Delay Time Tpd(1) Max
10.0ns
Voltage Supply - Internal
3 V ~ 3.6 V
Number Of Logic Elements/blocks
4
Number Of Macrocells
64
Number Of Gates
1250
Number Of I /o
66
Operating Temperature
0°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
100-TQFP, 100-VQFP
Voltage
3.0 V ~ 3.6 V
Memory Type
EEPROM
Number Of Logic Elements/cells
4
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Other names
544-1974
EPM3064ATC100-10N
MAX 3000A Programmable Logic Device Family Data Sheet
Programmable
Speed/Power
Control
Output
Configuration
20
MAX 3000A devices offer a power–saving mode that supports low-power
operation across user–defined signal paths or the entire device. This
feature allows total power dissipation to be reduced by 50% or more
because most logic applications require only a small fraction of all gates to
operate at maximum frequency.
The designer can program each individual macrocell in a MAX 3000A
device for either high–speed or low–power operation. As a result,
speed-critical paths in the design can run at high speed, while the
remaining paths can operate at reduced power. Macrocells that run at low
power incur a nominal timing delay adder (t
t
MAX 3000A device outputs can be programmed to meet a variety of
system–level requirements.
MultiVolt I/O Interface
The MAX 3000A device architecture supports the MultiVolt I/O interface
feature, which allows MAX 3000A devices to connect to systems with
differing supply voltages. MAX 3000A devices in all packages can be set
for 2.5–V, 3.3–V, or 5.0–V I/O pin operation. These devices have one set of
V
set for I/O output drivers (VCCIO).
The VCCIO pins can be connected to either a 3.3–V or 2.5–V power supply,
depending on the output requirements. When the VCCIO pins are
connected to a 2.5–V power supply, the output levels are compatible with
2.5–V systems. When the VCCIO pins are connected to a 3.3–V power
supply, the output high is at 3.3 V and is therefore compatible with 3.3-V
or 5.0–V systems. Devices operating with V
incur a nominally greater timing delay of t
always be driven by 2.5–V, 3.3–V, or 5.0–V signals.
Table 11
Note:
(1)
ACL
Table 11. MAX 3000A MultiVolt I/O Support
CC
V
, t
CCIO
When V
tolerant inputs.
pins for internal operation and input buffers (VCCINT), and another
EN
2.5
3.3
, t
Voltage
summarizes the MAX 3000A MultiVolt I/O support.
CPPW
CCIO
is 3.3 V, a MAX 3000A device can drive a 2.5–V device that has 3.3–V
and t
SEXP
2.5
v
v
Input Signal (V)
parameters.
3.3
v
v
5.0
v
v
OD2
CCIO
LPA
instead of t
) for the t
levels lower than 3.0 V
2.5
v
v
Output Signal (V)
Altera Corporation
LAD
OD1
3.3
v
, t
. Inputs can
LAC
, t
5.0
v
IC
,

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