EPM3512AFC256-10 Altera, EPM3512AFC256-10 Datasheet - Page 19
![IC MAX 3000A CPLD 512 256-FBGA](/photos/6/70/67063/544-256-fbga_sml.jpg)
EPM3512AFC256-10
Manufacturer Part Number
EPM3512AFC256-10
Description
IC MAX 3000A CPLD 512 256-FBGA
Manufacturer
Altera
Series
MAX® 3000Ar
Datasheet
1.EPM3032ATC44-10N.pdf
(46 pages)
Specifications of EPM3512AFC256-10
Programmable Type
In System Programmable
Delay Time Tpd(1) Max
10.0ns
Voltage Supply - Internal
3 V ~ 3.6 V
Number Of Logic Elements/blocks
32
Number Of Macrocells
512
Number Of Gates
10000
Number Of I /o
208
Operating Temperature
0°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
256-FBGA
Voltage
3.0 V ~ 3.6 V
Memory Type
EEPROM
Number Of Logic Elements/cells
32
Family Name
MAX 3000A
# Macrocells
512
Number Of Usable Gates
10000
Frequency (max)
125MHz
Propagation Delay Time
10ns
Number Of Logic Blocks/elements
32
# I/os (max)
208
Operating Supply Voltage (typ)
3.3V
In System Programmable
Yes
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.6V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
256
Package Type
FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Lead Free Status / Rohs Status
Not Compliant
Other names
544-2279
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EPM3512AFC256-10
Manufacturer:
ALTERA
Quantity:
59
Company:
Part Number:
EPM3512AFC256-10
Manufacturer:
ALTERA
Quantity:
917
Part Number:
EPM3512AFC256-10
Manufacturer:
ALTERA
Quantity:
20 000
Company:
Part Number:
EPM3512AFC256-10N
Manufacturer:
ALTERA
Quantity:
13
Company:
Part Number:
EPM3512AFC256-10N
Manufacturer:
ALTERA
Quantity:
917
Part Number:
EPM3512AFC256-10N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Altera Corporation
Figure 7
Figure 7. MAX 3000A JTAG Waveforms
Table 10
devices.
Captured
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
JCP
JCH
JCL
JPSU
JPH
JPCO
JPZX
JPXZ
JSSU
JSH
JSCO
JSZX
JSXZ
Table 10. JTAG Timing Parameters & Values for MAX 3000A Devices
Driven
Signal
Signal
to Be
to Be
TMS
TDO
TCK
TDI
shows the timing information for the JTAG signals.
shows the JTAG timing parameters and values for MAX 3000A
TCK clock period
TCK clock high time
TCK clock low time
JTAG port setup time
JTAG port hold time
JTAG port clock to output
JTAG port high impedance to valid output
JTAG port valid output to high impedance
Capture register setup time
Capture register hold time
Update register clock to output
Update register high impedance to valid output
Update register valid output to high impedance
t
JCH
MAX 3000A Programmable Logic Device Family Data Sheet
t
t
JPZX
JSZX
t
JCP
t
JSSU
t
JCL
Parameter
t
JSH
t
t
JPCO
JSCO
t
JPSU
t
t
JSXZ
JPH
Min
100
50
50
20
45
20
45
t
Max
JPXZ
25
25
25
25
25
25
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
19