EPM3512AFC256-10 Altera, EPM3512AFC256-10 Datasheet - Page 36
![IC MAX 3000A CPLD 512 256-FBGA](/photos/6/70/67063/544-256-fbga_sml.jpg)
EPM3512AFC256-10
Manufacturer Part Number
EPM3512AFC256-10
Description
IC MAX 3000A CPLD 512 256-FBGA
Manufacturer
Altera
Series
MAX® 3000Ar
Datasheet
1.EPM3032ATC44-10N.pdf
(46 pages)
Specifications of EPM3512AFC256-10
Programmable Type
In System Programmable
Delay Time Tpd(1) Max
10.0ns
Voltage Supply - Internal
3 V ~ 3.6 V
Number Of Logic Elements/blocks
32
Number Of Macrocells
512
Number Of Gates
10000
Number Of I /o
208
Operating Temperature
0°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
256-FBGA
Voltage
3.0 V ~ 3.6 V
Memory Type
EEPROM
Number Of Logic Elements/cells
32
Family Name
MAX 3000A
# Macrocells
512
Number Of Usable Gates
10000
Frequency (max)
125MHz
Propagation Delay Time
10ns
Number Of Logic Blocks/elements
32
# I/os (max)
208
Operating Supply Voltage (typ)
3.3V
In System Programmable
Yes
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.6V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
256
Package Type
FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Lead Free Status / Rohs Status
Not Compliant
Other names
544-2279
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EPM3512AFC256-10
Manufacturer:
ALTERA
Quantity:
59
Company:
Part Number:
EPM3512AFC256-10
Manufacturer:
ALTERA
Quantity:
917
Part Number:
EPM3512AFC256-10
Manufacturer:
ALTERA
Quantity:
20 000
Company:
Part Number:
EPM3512AFC256-10N
Manufacturer:
ALTERA
Quantity:
13
Company:
Part Number:
EPM3512AFC256-10N
Manufacturer:
ALTERA
Quantity:
917
Part Number:
EPM3512AFC256-10N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
MAX 3000A Programmable Logic Device Family Data Sheet
36
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
ZX3
XZ
SU
H
RD
COMB
IC
EN
GLOB
PRE
CLR
PIA
LPA
PD1
PD2
SU
H
FSU
FH
CO1
CH
CL
ASU
Table 23. EPM3256A Internal Timing Parameters (Part 2 of 2)
Table 24. EPM3512A External Timing Parameters
Symbol
Symbol
Output buffer enable delay, slow
slew rate = on
V
Output buffer disable delay
Register setup time
Register hold time
Register delay
Combinatorial delay
Array clock delay
Register enable time
Global control delay
Register preset time
Register clear time
PIA delay
Low–power adder
Input to non-registered output
I/O input to non-registered
output
Global clock setup time
Global clock hold time
Global clock setup time of fast
input
Global clock hold time of fast
input
Global clock to output delay
Global clock high time
Global clock low time
Array clock setup time
CCIO
= 2.5 V or 3.3 V
Parameter
Parameter
C1 = 35 pF
C1 = 35 pF
(2)
(2)
C1 = 35 pF
(2)
C1 = 35 pF
C1 = 5 pF
(2)
(5)
Conditions
Conditions
Note (1)
(2)
(2)
Min
5.6
0.0
3.0
0.0
1.0
3.0
3.0
2.5
Min
2.1
0.9
-7
Note (1)
–7
Max
Speed Grade
7.5
7.5
4.7
Max
Speed Grade
9.0
4.0
1.2
0.8
1.6
1.0
1.5
2.3
2.3
2.4
4.0
Min
1.0
7.6
0.0
3.0
0.0
4.0
4.0
3.5
Min
2.9
1.2
-10
–10
Altera Corporation
Max
10.0
10.0
6.3
Max
10.0
5.0
1.6
1.2
2.1
1.3
2.0
3.0
3.0
3.2
5.0
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns