ADSP-2184NKCA-320 Analog Devices Inc, ADSP-2184NKCA-320 Datasheet - Page 33

• Manufacturer Part Number: ADSP-2184NKCA-320
• Description: IC DSP 16BIT 80MHZ 144CSPBGA
• Manufacturer: Analog Devices Inc
• Series: ADSP-21xxr
• Type: Fixed Pointr

Specifications of ADSP-2184NKCA-320

• Rohs Status: RoHS non-compliant
• Interface: Host Interface, Serial Port
• Clock Rate: 80MHz
• Non-volatile Memory: External
• On-chip Ram: 20kB
• Voltage - I/o: 3.30V
• Voltage - Core: 1.80V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 144-CSPBGA
• Device Core Size: 16b
• Architecture: Enhanced Harvard
• Format: Fixed Point
• Clock Freq (max): 80MHz
• Mips: 80
• Device Input Clock Speed: 80MHz
• Ram Size: 20KB
• Program Memory Size: Not RequiredKB
• Operating Supply Voltage (typ): 1.8/2.5/3.3V
• Operating Supply Voltage (min): 1.71V
• Operating Supply Voltage (max): 1.89/3.6V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: CSPBGA
• Package: 144CSP-BGA
• Numeric And Arithmetic Format: Fixed-Point
• Maximum Speed: 80 MHz
• Device Million Instructions Per Second: 80 MIPS
• Lead Free Status / Rohs Status: Not Compliant

Serial Ports
Table 20. Serial Ports
Parameter
Timing Requirements:
t
t
t
t
Switching Characteristics:
t
t
t
t
t
t
t
t
t
t
SCK
SCS
SCH
SCP
CC
SCDE
SCDV
RH
RD
SCDH
TDE
TDV
SCDD
RDV
SCLK Period
DR/TFS/RFS Setup Before SCLK Low
DR/TFS/RFS Hold After SCLK Low
SCLKIN Width
CLKOUT High to SCLKOUT
SCLK High to DT Enable
SCLK High to DT Valid
TFS/RFS
TFS/RFS
DT Hold after SCLK High
TFS (Alt) to DT Enable
TFS (Alt) to DT Valid
SCLK High to DT Disable
RFS (Multichannel, Frame Delay Zero) to DT Valid
FR A ME DE LA Y 0
FR A ME DE LA Y 0
MU LTIC H A NN E L
MU LTIC H A NN E L
OUT
OUT
A LTER N A TE
ALTE R NA TE
Hold after SCLK High
Delay from SCLK High
CLKOUT
( MFD = 0 )
( MFD = 0 )
RFS
RFS
TFS
TFS
FR A ME
FRA M E
RFS
RFS
M ODE ,
TFS
M ODE ,
TFS
SCLK
M OD E
MO DE
O UT
OU T
O UT
O UT
DR
DT
IN
IN
IN
IN
t
t
S CD E
t
CC
TD E
t
R H
t
TD E
Rev. A | Page 33 of 48 | August 2006
t
t
RD
SC D V
t
t
t
t
TD V
R DV
TD V
R DV
Figure 31. Serial Ports
t
t
SC S
CC
t
SC H
t
SC D H
t
S C DD
t
S CP
Min
30
4
7
12
0.25t
0
0
0
0
t
S C K
CK
t
SC P
Max
0.25t
7
7
7
7
7
CK
+ 6
ADSP-218xN
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns