EP2C5T144C8N Altera, EP2C5T144C8N Datasheet - Page 18

IC CYCLONE II FPGA 5K 144-TQFP

EP2C5T144C8N

Manufacturer Part Number
EP2C5T144C8N
Description
IC CYCLONE II FPGA 5K 144-TQFP
Manufacturer
Altera
Series
Cyclone® IIr
Datasheet

Specifications of EP2C5T144C8N

Number Of Logic Elements/cells
4608
Number Of Labs/clbs
288
Total Ram Bits
119808
Number Of I /o
89
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
144-TQFP, 144-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Other names
544-1665

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP2C5T144C8N
Manufacturer:
ALTERA
Quantity:
28
Part Number:
EP2C5T144C8N
Manufacturer:
ALTERA73
Quantity:
6 170
Part Number:
EP2C5T144C8N
Manufacturer:
Altera
Quantity:
10 000
Part Number:
EP2C5T144C8N
Manufacturer:
ALTERA
0
Part Number:
EP2C5T144C8N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Part Number:
EP2C5T144C8N
0
Part Number:
EP2C5T144C8N@@@@@
Manufacturer:
ALTERA
0
Part Number:
EP2C5T144C8NK
Manufacturer:
ALTERA
0
Logic Elements
Figure 2–4. LE in Arithmetic Mode
2–6
Cyclone II Device Handbook, Volume 1
of previous LE)
cin (from cout
data1
data2
The Quartus II Compiler automatically creates carry chain logic during
design processing, or you can create it manually during design entry.
Parameterized functions such as LPM functions automatically take
advantage of carry chains for the appropriate functions.
The Quartus II Compiler creates carry chains longer than 16 LEs by
automatically linking LABs in the same column. For enhanced fitting, a
long carry chain runs vertically, which allows fast horizontal connections
to M4K memory blocks or embedded multipliers through direct link
interconnects. For example, if a design has a long carry chain in a LAB
column next to a column of M4K memory blocks, any LE output can feed
an adjacent M4K memory block through the direct link interconnect.
Whereas if the carry chains ran horizontally, any LAB not next to the
column of M4K memory blocks would use other row or column
interconnects to drive a M4K memory block. A carry chain continues as
far as a full column.
Three-Input
Three-Input
LUT
LUT
Register chain
connection
cout
clock (LAB Wide)
(LAB Wide)
ena (LAB Wide)
aclr (LAB Wide)
sload
(LAB Wide)
sclear
Register Feedback
ENA
D
CLRN
Q
Altera Corporation
February 2007
Row, column, and
direct link routing
Row, column, and
direct link routing
Local routing
Register
chain output

Related parts for EP2C5T144C8N