EP2C5F256C8 Altera, EP2C5F256C8 Datasheet - Page 51
EP2C5F256C8
Manufacturer Part Number
EP2C5F256C8
Description
IC CYCLONE II FPGA 5K 256-FBGA
Manufacturer
Altera
Series
Cyclone® IIr
Datasheet
1.EP2C5T144C8N.pdf
(168 pages)
Specifications of EP2C5F256C8
Number Of Logic Elements/cells
4608
Number Of Labs/clbs
288
Total Ram Bits
119808
Number Of I /o
158
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
256-FBGA
Family Name
Cyclone® II
Number Of Logic Blocks/elements
4608
# I/os (max)
158
Frequency (max)
402.58MHz
Process Technology
90nm
Operating Supply Voltage (typ)
1.2V
Logic Cells
4608
Ram Bits
119808
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
256
Package Type
FBGA
No. Of Macrocells
4608
Family Type
Cyclone II
No. Of I/o's
158
Clock Management
PLL
I/o Supply Voltage
3.6V
Operating Frequency Max
320MHz
Rohs Compliant
No
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Not Compliant
Other names
544-1446
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP2C5F256C8
Manufacturer:
TOSHIBA
Quantity:
1
Part Number:
EP2C5F256C8
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Company:
Part Number:
EP2C5F256C8N
Manufacturer:
ALTBRA
Quantity:
36
Company:
Part Number:
EP2C5F256C8N
Manufacturer:
ALTERA82
Quantity:
1 080
Part Number:
EP2C5F256C8N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Figure 2–21. Row I/O Block Connection to the Interconnect
Notes to
(1)
(2)
Altera Corporation
February 2007
The 35 data and control signals consist of five data out lines, io_dataout[4..0], five output enables,
io_coe[4..0], five input clock enables, io_cce_in[4..0], five output clock enables, io_cce_out[4..0],
five clocks, io_cclk[4..0], five asynchronous clear signals, io_caclr[4..0], and five synchronous clear
signals, io_csclr[4..0].
Each of the five IOEs in the row I/O block can have two io_datain (combinational or registered) inputs.
LAB Local
Interconnect
R4 & R24 Interconnects
Figure
to Adjacent LAB
Interconnect
Direct Link
2–21:
LAB
io_datain0[4..0]
io_datain1[4..0] (2)
C4 Interconnects
from Adjacent LAB
Interconnect
Direct Link
I/O Block Local
Interconnect
io_clk[5..0]
35
Cyclone II Device Handbook, Volume 1
I/O Block
Contains up to
Row I/O Block
Row
Five IOEs
Cyclone II Architecture
35 Data and
Control Signals
from Logic Array (1)
2–39