EP2SGX60EF1152C3N Altera, EP2SGX60EF1152C3N Datasheet - Page 89

IC STRATIX II GX 60K 1152-FBGA

EP2SGX60EF1152C3N

Manufacturer Part Number
EP2SGX60EF1152C3N
Description
IC STRATIX II GX 60K 1152-FBGA
Manufacturer
Altera
Series
Stratix® II GXr
Datasheet

Specifications of EP2SGX60EF1152C3N

Number Of Logic Elements/cells
60440
Number Of Labs/clbs
3022
Total Ram Bits
2544192
Number Of I /o
534
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1152-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Other names
544-2181

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Digital Signal
Processing
(DSP) Block
Altera Corporation
October 2007
The most commonly used DSP functions are finite impulse response (FIR)
filters, complex FIR filters, infinite impulse response (IIR) filters, fast
Fourier transform (FFT) functions, direct cosine transform (DCT)
functions, and correlators. All of these use the multiplier as the
fundamental building block. Additionally, some applications need
specialized operations such as multiply-add and multiply-accumulate
operations. Stratix II GX devices provide DSP blocks to meet the
arithmetic requirements of these functions.
Each Stratix II GX device has two to four columns of DSP blocks to
efficiently implement DSP functions faster than ALM-based
implementations. Stratix II GX devices have up to 24 DSP blocks per
column (see
to:
As indicated, the Stratix II GX DSP block can support one 36 × 36-bit
multiplier in a single DSP block, and is true for any combination of
signed, unsigned, or mixed sign multiplications.
Eight 9 × 9-bit multipliers
Four 18 × 18-bit multipliers
One 36 × 36-bit multiplier
Table
2–21). Each DSP block can be configured to support up
Stratix II GX Device Handbook, Volume 1
Stratix II GX Architecture
2–81

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