EP1C4F400C7 Altera, EP1C4F400C7 Datasheet - Page 55

• Manufacturer Part Number: EP1C4F400C7
• Description: IC CYCLONE FPGA 4K LE 400-FBGA
• Manufacturer: Altera
• Series: Cyclone®r

Specifications of EP1C4F400C7

• Number Of Logic Elements/cells: 4000
• Number Of Labs/clbs: 400
• Total Ram Bits: 78336
• Number Of I /o: 301
• Voltage - Supply: 1.425 V ~ 1.575 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 400-FBGA
• Family Name: Cyclone®
• Number Of Logic Blocks/elements: 4000
• # I/os (max): 301
• Frequency (max): 320.1MHz
• Process Technology: 0.13um (CMOS)
• Operating Supply Voltage (typ): 1.5V
• Logic Cells: 4000
• Ram Bits: 78336
• Operating Supply Voltage (min): 1.425V
• Operating Supply Voltage (max): 1.575V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 400
• Package Type: FBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Not Compliant
• Other names: 544-2079

Figure 2–34. DDR SDRAM and FCRAM Interfacing
Altera Corporation
May 2008
PLL
OE
Phase Shifted -90˚
Register
OE LE
Register
OE LE
GND
V
CC
Output LE
Output LE
Register
Register
Programmable Drive Strength
The output buffer for each Cyclone device I/O pin has a programmable
drive strength control for certain I/O standards. The LVTTL and
LVCMOS standards have several levels of drive strength that the designer
can control. SSTL-3 class I and II, and SSTL-2 class I and II support a
minimum setting, the lowest drive strength that guarantees the I
Programmable
Delay Chain
clk
DQS
Δ t
OE
Register
OE LE
Global Clock
Register
OE LE
DataA
DataB
Output LE
Output LE
Registers
Registers
-90˚ clk
DQ
Adjacent LAB LEs
Register
Register
LE
LE
Registers
Registers
Input LE
Input LE
I/O Structure
Preliminary
Adjacent
LAB LEs
Resynchronizing
Global Clock
OH
/I
2–49
OL