EP3C40F780I7 Altera, EP3C40F780I7 Datasheet - Page 61

IC CYCLONE III FPGA 40K 780 FBGA

EP3C40F780I7

Manufacturer Part Number
EP3C40F780I7
Description
IC CYCLONE III FPGA 40K 780 FBGA
Manufacturer
Altera
Series
Cyclone® IIIr

Specifications of EP3C40F780I7

Number Of Logic Elements/cells
39600
Number Of Labs/clbs
2475
Total Ram Bits
1161216
Number Of I /o
535
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
780-FBGA
Family Name
Cyclone III
Number Of Logic Blocks/elements
39600
# I/os (max)
535
Frequency (max)
437.5MHz
Process Technology
65nm
Operating Supply Voltage (typ)
1.2V
Logic Cells
39600
Ram Bits
1161216
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
780
Package Type
FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Not Compliant

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Chapter 4: Embedded Multipliers in the Cyclone III Device Family
Operational Modes
Output Registers
Operational Modes
© December 2009
1
1
Altera Corporation
When the signa and signb signals are unused, the Quartus II software sets the
multiplier to perform unsigned multiplication by default.
You can register the embedded multiplier output using output registers in either
18- or 36-bit sections, depending on the operational mode of the multiplier. The
following control signals are available for each output register in the embedded
multiplier:
All input and output registers in a single embedded multiplier are fed by the same
clock, clock enable, and asynchronous clear signals.
You can use an embedded multiplier block in one of two operational modes,
depending on the application needs:
You can also use embedded multipliers of the Cyclone III device family to implement
multiplier adder and multiplier accumulator functions, in which the multiplier
portion of the function is implemented using embedded multipliers, and the adder or
accumulator function is implemented in logic elements (LEs).
clock
clock enable
asynchronous clear
One 18-bit × 18-bit multiplier
Up to two 9-bit × 9-bit independent multipliers
Cyclone III Device Handbook, Volume 1
4–5

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