EP3CLS70F484I7N Altera, EP3CLS70F484I7N Datasheet - Page 242
EP3CLS70F484I7N
Manufacturer Part Number
EP3CLS70F484I7N
Description
IC FPGA CYCIII LS 70K 484-FBGA
Manufacturer
Altera
Series
Cyclone® IIIr
Datasheets
1.EP3C5F256C8N.pdf
(5 pages)
2.EP3C5F256C8N.pdf
(34 pages)
3.EP3C5F256C8N.pdf
(66 pages)
4.EP3C5F256C8N.pdf
(14 pages)
5.EP3C5F256C8N.pdf
(76 pages)
6.EP3CLS70F484I7N.pdf
(274 pages)
Specifications of EP3CLS70F484I7N
Number Of Logic Elements/cells
70208
Number Of Labs/clbs
4388
Total Ram Bits
3068928
Number Of I /o
278
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
484-FBGA
Family Name
Cyclone III LS
Number Of Logic Blocks/elements
70208
# I/os (max)
278
Frequency (max)
437.5MHz
Process Technology
65nm
Operating Supply Voltage (typ)
1.2V
Logic Cells
70208
Ram Bits
3068928
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
484
Package Type
FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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9–82
Dedicated Remote System Upgrade Circuitry
Cyclone III Device Handbook, Volume 1
This section explains the implementation of the Cyclone III device family remote
system upgrade dedicated circuitry. The remote system upgrade circuitry is
implemented in hard logic. This dedicated circuitry interfaces to the user-defined
factory application configurations implemented in the Cyclone III device family logic
array to provide the complete remote configuration solution. The remote system
upgrade circuitry contains the remote system upgrade registers, a watchdog timer,
and state machines that control those components.
the remote system upgrade block.
Figure 9–35. Remote System Upgrade Circuit Data Path
Notes to
(1) RU_DOUT, RU_SHIFTnLD, RU_CAPTnUPDT, RU_CLK, RU_DIN,RU_nCONFIG, and RU_nRSTIMER signals
(2) RU_CLK refers to ALTREMOTE_UPDATE megafunction block "clock" input. For more information, refer to the
are internally controlled by the ALTREMOTE_UPDATE megafunction.
Remote Update Circuitry (ALTREMOTE_UPDATE) Megafunction User
Previous
State
Register 2
Bit[30..0]
Figure
Chapter 9: Configuration, Design Security, and Remote System Upgrades in the Cyclone III Device Family
RU_DIN
9–35:
Status Register (SR)
Previous
State
Register 1
Bit[30..0]
din
RU_SHIFTnLD
Bit [40..39]
Logic
Current
State
Logic
Bit[31..0]
Shift Register
RU_CAPTnUPDT
dout
din
Logic Array
Bit [38..0]
Update Register
Bit [38..0]
Control Register
Bit [38..0]
Logic
clkout
capture
update
capture
dout
Logic
RU_CLK (2)
clkin
update
(Note 1)
Figure 9–35
Guide.
RU_DOUT
© December 2009 Altera Corporation
Internal Oscillator
RSU
Reconfiguration
State
Machine
RSU
Master
State
Machine
RU_nCONFIG
shows the data path of
Remote System Upgrade
timeout
RU_nRSTIMER
User
Watchdog
Timer
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