EP1S25F780C6 Altera, EP1S25F780C6 Datasheet - Page 66
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EP1S25F780C6
Manufacturer Part Number
EP1S25F780C6
Description
IC STRATIX FPGA 25K LE 780-FBGA
Manufacturer
Altera
Series
Stratix®r
Datasheet
1.EP1S10F780C7.pdf
(276 pages)
Specifications of EP1S25F780C6
Number Of Logic Elements/cells
25660
Number Of Labs/clbs
2566
Total Ram Bits
1944576
Number Of I /o
597
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
780-FBGA
Family Name
Stratix
Number Of Logic Blocks/elements
25660
# I/os (max)
597
Frequency (max)
450.05MHz
Process Technology
0.13um (CMOS)
Operating Supply Voltage (typ)
1.5V
Logic Cells
25660
Ram Bits
1944576
Operating Supply Voltage (min)
1.425V
Operating Supply Voltage (max)
1.575V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
780
Package Type
FC-FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Not Compliant
Other names
544-1121
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Manufacturer
Quantity
Price
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1 045
Digital Signal Processing Block
Digital Signal
Processing
Block
2–52
Stratix Device Handbook, Volume 1
The most commonly used DSP functions are finite impulse response (FIR)
filters, complex FIR filters, infinite impulse response (IIR) filters, fast
Fourier transform (FFT) functions, direct cosine transform (DCT)
functions, and correlators. All of these blocks have the same fundamental
building block: the multiplier. Additionally, some applications need
specialized operations such as multiply-add and multiply-accumulate
operations. Stratix devices provide DSP blocks to meet the arithmetic
requirements of these functions.
Each Stratix device has two columns of DSP blocks to efficiently
implement DSP functions faster than LE-based implementations. Larger
Stratix devices have more DSP blocks per column (see
DSP block can be configured to support up to:
■
■
■
As indicated, the Stratix DSP block can support one 36 × 36-bit multiplier
in a single DSP block. This is true for any matched sign multiplications
(either unsigned by unsigned or signed by signed), but the capabilities for
dynamic and mixed sign multiplications are handled differently. The
following list provides the largest functions that can fit into a single DSP
block.
■
■
■
■
■
■
■
■
■
■
1
Figure 2–29
Eight 9 × 9-bit multipliers
Four 18 × 18-bit multipliers
One 36 × 36-bit multiplier
36 × 36-bit unsigned by unsigned multiplication
36 × 36-bit signed by signed multiplication
35 × 36-bit unsigned by signed multiplication
36 × 35-bit signed by unsigned multiplication
36 × 35-bit signed by dynamic sign multiplication
35 × 36-bit dynamic sign by signed multiplication
35 × 36-bit unsigned by dynamic sign multiplication
36 × 35-bit dynamic sign by unsigned multiplication
35 × 35-bit dynamic sign multiplication when the sign controls for
each operand are different
36 × 36-bit dynamic sign multiplication when the same sign control
is used for both operands
This list only shows functions that can fit into a single DSP block.
Multiple DSP blocks can support larger multiplication
functions.
shows one of the columns with surrounding LAB rows.
Table
Altera Corporation
2–13). Each
July 2005