EP3SL150F1152C2N Altera, EP3SL150F1152C2N Datasheet - Page 326
![IC STRATX III FPGA 150K 1152FBGA](/photos/6/72/67293/544-1152-fbga_sml.jpg)
EP3SL150F1152C2N
Manufacturer Part Number
EP3SL150F1152C2N
Description
IC STRATX III FPGA 150K 1152FBGA
Manufacturer
Altera
Series
Stratix® IIIr
Datasheets
1.EP3SL150F780C4N.pdf
(16 pages)
2.EP3SL150F780C4N.pdf
(332 pages)
3.EP3SL150F780C4N.pdf
(456 pages)
Specifications of EP3SL150F1152C2N
Number Of Logic Elements/cells
142500
Number Of Labs/clbs
5700
Total Ram Bits
6390
Number Of I /o
744
Voltage - Supply
0.86 V ~ 1.15 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1152-FBGA
For Use With
544-2568 - KIT DEVELOPMENT STRATIX III
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Other names
544-2409
EP3SL150F1152C2NES
EP3SL150F1152C2NES
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP3SL150F1152C2N
Manufacturer:
ALTERA
Quantity:
20 000
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Glossary
Table 1.
Stratix III Device Handbook, Volume 2
Glossary Table (Part 1 of 4)
Letter
A
B
C
D
E
F
G
H
I
Differential I/O
Standards
f
H S D R D P A
Subject
f
f
H S C L K
H S D R
—
—
—
—
—
—
—
The following table lists the glossary for this chapter.
Receiver Input Waveforms
Transmitter Output Waveforms
High-Speed I/O Block: High-speed receiver/transmitter input and output clock frequency.
High-Speed I/O Block: Maximum/minimum LVDS data transfer rate
(f
High-Speed I/O Block: Maximum/minimum LVDS data transfer rate
(f
H S D R
H S D R D P A
= 1/TUI), non-DPA.
Single-Ended Waveform
Differential Waveform
Single-Ended Waveform
Differential Waveform
= 1/TUI), DPA.
V
V
CM
CM
V
V
OD
Chapter 1: Stratix III Device Datasheet: DC and Switching Characteristics
ID
V
V
OD
ID
Definitions
—
—
—
—
—
—
—
V
V
OD
ID
p − n = 0 V
p − n = 0 V
Positive Channel (p) = V
Negative Channel (n) = V
Ground
Positive Channel (p) = V
Negative Channel (n) = V
Ground
© July 2010 Altera Corporation
OH
IH
OL
IL
Glossary
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