EP2S180F1020C4 Altera, EP2S180F1020C4 Datasheet - Page 148
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EP2S180F1020C4
Manufacturer Part Number
EP2S180F1020C4
Description
IC STRATIX II FPGA 180K 1020FBGA
Manufacturer
Altera
Series
Stratix® IIr
Datasheet
1.EP2S15F484I4N.pdf
(238 pages)
Specifications of EP2S180F1020C4
Number Of Logic Elements/cells
179400
Number Of Labs/clbs
8970
Total Ram Bits
9383040
Number Of I /o
742
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1020-FBGA
Family Name
Stratix II
Number Of Logic Blocks/elements
179400
# I/os (max)
742
Frequency (max)
711.24MHz
Process Technology
90nm (CMOS)
Operating Supply Voltage (typ)
1.2V
Logic Cells
179400
Ram Bits
9383040
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
1020
Package Type
FC-FBGA
For Use With
544-1701 - DSP PRO KIT W/SII EP2S180N
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Not Compliant
Other names
544-1415
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP2S180F1020C4
Manufacturer:
ALTERA
Quantity:
3 000
Part Number:
EP2S180F1020C4
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Company:
Part Number:
EP2S180F1020C4N
Manufacturer:
MICROCHIP
Quantity:
12 000
Company:
Part Number:
EP2S180F1020C4N
Manufacturer:
ALTERA
Quantity:
748
Operating Conditions
5–12
Stratix II Device Handbook, Volume 1
Note to
(1)
Note to
(1)
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
Table 5–19. SSTL-2 Class I Specifications
Table 5–20. SSTL-2 Class II Specifications
Symbol
Symbol
CCIO
TT
REF
IH
IL
I H
I L
OH
OL
CCIO
TT
REF
IH
IL
I H
I L
OH
OL
(DC)
(DC)
(DC)
(DC)
(AC)
(AC)
(AC)
(AC)
This specification is supported across all the programmable drive settings available for this I/O standard as shown
in the Stratix II Architecture chapter in volume 1 of the Stratix II Device Handbook.
This specification is supported across all the programmable drive settings available for this I/O standard as shown
in the Stratix II Architecture chapter in volume 1 of the Stratix II Device Handbook.
Table
Table
Output supply voltage
Termination voltage
Reference voltage
High-level DC input voltage
Low-level DC input voltage
High-level AC input voltage
Low-level AC input voltage
High-level output voltage
Low-level output voltage
Output supply voltage
Termination voltage
Reference voltage
High-level DC input voltage
Low-level DC input voltage
High-level AC input voltage
Low-level AC input voltage
High-level output voltage
Low-level output voltage
5–19:
5–20:
Parameter
Parameter
I
I
I
I
OH
OL
OH
OL
= 8.1 mA
= 16.4 mA
Conditions
= –8.1 mA
Conditions
= –16.4 mA
(1)
(1)
(1)
(1)
V
V
V
V
V
V
V
V
Minimum
Minimum
R E F
R E F
REF
REF
REF
REF
TT
TT
2.375
1.188
–0.30
2.375
1.188
–0.30
+ 0.57
+ 0.76
– 0.04
+ 0.18
– 0.04
+ 0.18
+ 0.35
+ 0.35
Typical
Typical
2.500
1.250
2.500
1.250
V
V
REF
REF
Altera Corporation
V
V
V
V
V
V
V
V
V
Maximum
Maximum
CCIO
R E F
R E F
REF
REF
REF
REF
TT
TT
2.625
1.313
2.625
1.313
3.00
– 0.57
– 0.76
+ 0.04
– 0.18
+ 0.04
– 0.18
+ 0.30
- 0.35
- 0.35
April 2011
Unit
Unit
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V