XC5VSX50T-2FF665C Xilinx Inc, XC5VSX50T-2FF665C Datasheet - Page 43

IC FPGA VIRTEX-5 50K 665FCBGA

XC5VSX50T-2FF665C

Manufacturer Part Number
XC5VSX50T-2FF665C
Description
IC FPGA VIRTEX-5 50K 665FCBGA
Manufacturer
Xilinx Inc
Series
Virtex™-5 SXTr

Specifications of XC5VSX50T-2FF665C

Number Of Logic Elements/cells
52224
Number Of Labs/clbs
4080
Total Ram Bits
4866048
Number Of I /o
360
Voltage - Supply
0.95 V ~ 1.05 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
665-BBGA, FCBGA
For Use With
HW-V5-ML506-UNI-G - EVALUATION PLATFORM VIRTEX-5
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Output Serializer/Deserializer Switching Characteristics
Table 63: OSERDES Switching Characteristics
DS202 (v5.3) May 5, 2010
Product Specification
Notes:
1.
Setup/Hold
T
T
T
T
T
T
Sequential Delays
T
T
Combinatorial
T
T
T
OSDCK_D
OSDCK_T
OSDCK_T2
OSCCK_OCE
OSCCK_S
OSCCK_TCE
OSCKO_OQ
OSCKO_TQ
OSDO_TTQ
OSCO_OQ
OSCO_TQ
T
OSDCK_T2
/T
/T
/T
OSCKD_T
OSCKD_D
Symbol
/T
/T
OSCKD_T2
OSCKC_TCE
OSCKC_OCE
and T
(1)
OSCKD_T2
(1)
are reported as T
D input Setup/Hold with respect to CLKDIV
T input Setup/Hold with respect to CLK
T input Setup/Hold with respect to CLKDIV
OCE input Setup/Hold with respect to CLK
SR (Reset) input Setup with respect to CLKDIV
TCE input Setup/Hold with respect to CLK
Clock to out from CLK to OQ
Clock to out from CLK to TQ
T input to TQ Out
Asynchronous Reset to OQ
Asynchronous Reset to TQ
OSDCK_T
/T
Description
OSCKD_T
www.xilinx.com
Virtex-5 FPGA Data Sheet: DC and Switching Characteristics
in TRACE report.
–0.02
–0.18
–0.03
–0.07
–0.06
0.21
0.28
0.21
0.16
0.52
0.20
0.59
0.61
0.62
1.57
1.63
-3
Speed Grade
–0.02
–0.18
–0.03
–0.07
–0.06
0.24
0.34
0.24
0.19
0.58
0.23
0.60
0.62
0.70
1.82
1.89
-2
–0.02
–0.18
–0.03
–0.07
–0.06
0.30
0.41
0.28
0.23
0.70
0.29
0.61
0.62
0.83
2.19
2.27
-1
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
43

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