AN2135SC Cypress Semiconductor Corp, AN2135SC Datasheet - Page 102

• Manufacturer Part Number: AN2135SC
• Description: IC MCU 8051 8K RAM 24MHZ 44QFP
• Manufacturer: Cypress Semiconductor Corp
• Series: EZ-USB®r

Specifications of AN2135SC

• Applications: USB Microcontroller
• Core Processor: 8051
• Program Memory Type: ROMless
• Controller Series: AN213x
• Ram Size: 8K x 8
• Interface: I²C, USB
• Number Of I /o: 8
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 44-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 428-1308

IN tokens (4) and (7) until the data is ready. Eventually, the 8051 fills the endpoint buffer
with data, and then loads the endpoint’s byte count register (INnBC) with the number of
bytes in the packet (6). Loading the byte count re-arms the given endpoint. When the next
IN token arrives (7) the USB core transfers the next data packet (8).
Interrupt transfers are handled just like bulk transfers.
The only difference between a bulk endpoint and an interrupt endpoint exists in the end-
point descriptor, where the endpoint is identified as type interrupt, and a polling interval is
specified. The polling interval determines how often the USB host issues IN tokens to the
interrupt endpoint.
Suppose 220 bytes are to be transferred to the host using endpoint 2-IN. Further assume
that MaxPacketSize of 64 bytes for endpoint 2-IN has been reported to the host during
enumeration. Because the total transfer size exceeds the maximum packet size, the 8051
divides the 220-byte transfer into four transfers of 64, 64, 64, and 28 bytes.
After loading the first 64 bytes into IN2BUF (at 0x7C00), the 8051 loads the byte count
register IN6BC with the value 64. Writing the byte count register instructs the EZ-USB
core to respond to the next host IN token by transmitting the 64 bytes in the buffer. Until
the byte count register is loaded to arm the IN transfer, any IN tokens issued by the host
are answered by EZ-USB with NAK (Not-Acknowledge) tokens, telling the USB host that
the endpoint is not yet ready with data. The host continues to issue IN tokens to endpoint
2-IN until data is ready for transfer—whereupon the EZ-USB core replaces NAKs with
valid data.
When the 8051 initiates an IN transfer by loading the endpoint’s byte count register, the
EZ-USB core sets a busy bit to instruct the 8051 to hold off loading IN2BUF until the
USB transfer is finished. When the IN transfer is complete and successfully acknowl-
edged, the EZ-USB core resets the endpoint 2-IN busy bit and generates an endpoint 2-IN
interrupt request. If the endpoint 2-IN interrupt is enabled, program control automatically
vectors to the data transfer routine for further action (Autovectoring is enabled by setting
AVEN=1; refer to Chapter 9, "EZ-USB Interrupts").
EZ-USB TRM v1.9
6.3
6.4
Interrupt Transfers
EZ-USB Bulk IN Example
Chapter 6. EZ-USB CPU
Page 6-5