AN2135SC Cypress Semiconductor Corp, AN2135SC Datasheet - Page 113

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AN2135SC

Manufacturer Part Number
AN2135SC
Description
IC MCU 8051 8K RAM 24MHZ 44QFP
Manufacturer
Cypress Semiconductor Corp
Series
EZ-USB®r
Datasheet

Specifications of AN2135SC

Applications
USB Microcontroller
Core Processor
8051
Program Memory Type
ROMless
Controller Series
AN213x
Ram Size
8K x 8
Interface
I²C, USB
Number Of I /o
8
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
44-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
428-1308

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The vector values are four bytes apart. This allows the programmer to build a jump table
to each of the interrupt service routines. Note that the jump table must begin on a page
(256 byte) boundary because the first vector starts at 00. If Autovectoring is not used
(AVEN=0), the IVEC register may be directly inspected to determine the USB interrupt
source (see Section 9.11, "Autovector Coding").
Each bulk endpoint interrupt has an associated interrupt enable bit (in IN07IEN and
OUT07IEN), and an interrupt request bit (in IN07IRQ and OUT07IRQ). The interrupt
service routine. IRQ bits are cleared by writing a “1.” Because all USB registers are
accessed using “movx@dptr” instructions, USB interrupt service routines must save and
restore both data pointers, the DPS register, and the accumulator before clearing interrupt
request bits.
This simple (but fully-functional) example illustrates the bulk transfer mechanism using
interrupts. In the example program, BULK endpoint 6 is used to loop data back to the
host. Data sent by the host over endpoint 2-OUT is sent back over endpoint 2-IN.
Page 6-16
Note
Any USB ISR should clear the 8051 INT2 interrupt request bit before clearing any of the
EZ-USB endpoint IRQ bits, to avoid losing interrupts. Interrupts are discussed in more
detail in Chapter 9, "EZ-USB Interrupts."
Individual interrupt request bits are cleared by writing “1” to them to simplify code. For
example, to clear the endpoint 2-IN IRQ, simply write “0000100” to IN07IRQ. This will
not disturb the other interrupt request bits. Do not read the contents of IN07IRQ, logi-
cal-OR the contents with 01, and write it back. This clears all other pending interrupts
because you are writing “1”s to them.
6.14
Interrupt Bulk Transfer Example
Chapter 6. EZ-USB CPU
EZ-USB TRM v1.9

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