CY7C64013-SC Cypress Semiconductor Corp, CY7C64013-SC Datasheet - Page 19

• Manufacturer Part Number: CY7C64013-SC
• Description: IC MCU 8K FULL SPEED USB 28SOIC
• Manufacturer: Cypress Semiconductor Corp
• Series: M8™r

Specifications of CY7C64013-SC

• Applications: USB Microcontroller
• Core Processor: M8C
• Program Memory Type: OTP (8 kB)
• Controller Series: CY7C640xx
• Ram Size: 256 x 8
• Interface: I²C, USB, HAPI
• Number Of I /o: 19
• Voltage - Supply: 4 V ~ 5.25 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 28-SOIC (7.5mm Width)
• For Use With: 428-1339 - KIT LOW SPEED PERSONALITY BOARD
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 428-1327

9.0
There are up to 32 GPIO pins (P0[7:0], P1[7:0], P2[7:0], and P3[7:0]) for the hardware interface. The number of GPIO pins
changes based on the package type of the chip. Each port can be configured as inputs with internal pull-ups, open drain outputs,
or traditional CMOS outputs. Port 3 offers a higher current drive, with typical current sink capability of 12 mA. The data for each
GPIO port is accessible through the data registers. Port data registers are shown in Figure 9-2 through Figure 9-5, and are set
to 1 on reset.
Port 0 Data
Port 1 Data
Document #: 38-08001 Rev. *A
Bit #
Bit Name
Read/Write
Reset
Bit #
Bit Name
Read/Write
Reset
Bit #
Bit Name
Read/Write
Reset
Port 2 Data
General-Purpose I/O (GPIO) Ports
P0.7
P1.7
P2.7
R/W
R/W
R/W
(Latch is Transparent
except in HAPI mode)
7
1
7
1
7
1
Interrupt
Controller
Interrupt
Enable
OE
Port Write
Reg_Bit
Port Read
Internal
Data Bus
STRB
GPIO
CFG
P0.6
R/W
P1.6
R/W
P2.6
R/W
6
1
6
1
6
1
Figure 9-1. Block Diagram of a GPIO Pin
Data
In
Latch
Data
Interrupt
Latch
Data
Out
Latch
P0.5
R/W
P1.5
R/W
P2.5
R/W
5
1
5
1
5
1
Figure 9-2. Port 0 Data
Figure 9-3. Port 1 Data
Figure 9-4. Port 2 Data
mode
2-bits
P0.4
P1.4
P2.4
R/W
R/W
R/W
4
1
4
1
4
1
Q3*
Q1
14 kΩ
V
P0.3
P1.3
P2.3
R/W
R/W
R/W
3
1
3
1
3
1
CC
Q2
*Port 0,1,2: Low I
Port 3: High I
P0.2
P1.2
P2.2
R/W
R/W
R/W
2
1
2
1
2
1
GPIO
PIN
sink
sink
P0.1
P1.1
P2.1
R/W
R/W
R/W
1
1
1
1
1
1
CY7C64013
CY7C64113
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ADDRESS 0x00
ADDRESS 0x01
ADDRESS 0x02
P0.0
R/W
P1.0
R/W
P2.0
R/W
0
1
0
1
0
1