CY7C65113-SC Cypress Semiconductor Corp, CY7C65113-SC Datasheet - Page 4
![no-image](/images/manufacturer_photos/0/1/179/cypress_semiconductor_corp_sml.jpg)
CY7C65113-SC
Manufacturer Part Number
CY7C65113-SC
Description
IC MCU 8K USB HUB 4 PORT 28-SOIC
Manufacturer
Cypress Semiconductor Corp
Specifications of CY7C65113-SC
Applications
USB Hub/Microcontroller
Core Processor
M8
Program Memory Type
OTP (8 kB)
Controller Series
USB Hub
Ram Size
256 x 8
Interface
I²C, USB
Number Of I /o
11
Voltage - Supply
4 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
28-SOIC (7.5mm Width)
Operating Temperature (max)
70C
Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Package Type
SOIC
Mounting
Surface Mount
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With
CY3649 - PROGRAMMER HI-LO USB M8428-1339 - KIT LOW SPEED PERSONALITY BOARD
Lead Free Status / RoHS Status
Not Compliant, Contains lead / RoHS non-compliant
Other names
428-1331
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY7C65113-SC
Manufacturer:
CYPRESS/赛普拉斯
Quantity:
20 000
Document #: 38-08002 Rev. *D
Figure 16-5. Hub Ports Force Low Register .........................................................................................31
Figure 16-6. Hub Ports SE0 Status Register .......................................................................................31
Figure 16-7. Hub Ports Data Register ..................................................................................................32
Figure 16-8. Hub Ports Suspend Register ...........................................................................................32
Figure 16-9. Hub Ports Resume Status Register .................................................................................33
Figure 16-10. USB Status and Control Register ..................................................................................33
Figure 17-1. USB Device Address Registers .......................................................................................34
Figure 17-2. USB Device Endpoint Zero Mode Registers ....................................................................35
Figure 17-3. USB Non-control Device Endpoint Mode Registers ........................................................36
Figure 17-4. USB Endpoint Counter Registers ....................................................................................36
Figure 17-5. Token/Data Packet Flow Diagram ...................................................................................38
Table 4-1. Pin Assignments ...................................................................................................................8
Table 4-2. I/O Register Summary ..........................................................................................................9
Table 4-3. Instruction Set Summary .....................................................................................................10
Table 9-1. GPIO Port Output Control Truth Table and Interrupt Polarity .............................................19
Table 11-1. I
Table 12-1. I
Table 14-1. Interrupt Vector Assignments ............................................................................................26
Table 16-1. Control Bit Definition for Downstream Ports .....................................................................31
Table 16-2. Control Bit Definition for Upstream Port ............................................................................34
Table 17-1. Memory Allocation for Endpoints .....................................................................................35
Table 18-1. USB Register Mode Encoding ..........................................................................................39
Table 18-2. Decode table for Table 18-3: “Details of Modes for Differing Traffic Condition .................40
Table 18-3. Details of Modes for Differing Traffic Conditions ...............................................................41
2
2
C Port Configuration .......................................................................................................20
C Status and Control Register Bit Definitions .................................................................21
LIST OF TABLES
CY7C65113C
Page 4 of 49