CY7C64714-56LFXC Cypress Semiconductor Corp, CY7C64714-56LFXC Datasheet - Page 2

• Manufacturer Part Number: CY7C64714-56LFXC
• Description: IC MCU USB EZ FX1 16KB 56VQFN
• Manufacturer: Cypress Semiconductor Corp
• Series: EZ-USB FX1™r

Specifications of CY7C64714-56LFXC

• Applications: USB Microcontroller
• Core Processor: 8051
• Program Memory Type: ROMless
• Controller Series: CY7C647xx
• Ram Size: 16K x 8
• Interface: I²C, USB, USART
• Number Of I /o: 24
• Voltage - Supply: 3.15 V ~ 3.45 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 56-VQFN Exposed Pad, 56-HVQFN, 56-SQFN, 56-DHVQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

2.0
EZ-USB FX1
integrated, USB microcontroller. By integrating the USB trans-
ceiver, serial interface engine (SIE), enhanced 8051 microcon-
troller, and a programmable peripheral interface in a single
chip, Cypress has created a very cost-effective solution that
provides superior time-to-market advantages.
Because it incorporates the USB transceiver, the EZ-USB FX1
is more economical, providing a smaller footprint solution than
USB SIE or external transceiver implementations. With
EZ-USB FX1, the Cypress Smart SIE handles most of the USB
protocol in hardware, freeing the embedded microcontroller for
application-specific functions and decreasing development
time to ensure USB compatibility.
The General Programmable Interface (GPIF) and Master/
Slave Endpoint FIFO (8- or 16-bit data bus) provides an easy
and glueless interface to popular interfaces such as ATA,
UTOPIA, EPP, PCMCIA, and most DSP/processors.
Three lead-free packages are defined for the family: 56 QFN,
100 TQFP, and 128 TQFP.
3.0
The “Reference Designs” section of the cypress website
provides additional tools for typical USB applications. Each
reference design comes complete with firmware source and
object code, schematics, and documentation. Please visit
http://www.cypress.com for more information.
4.0
4.1
FX1 operates at one of the three rates defined in the USB
Specification Revision 2.0, dated April 27, 2000:
FX1 does not support the low-speed signaling mode of 1.5
Mbps or the high-speed mode of 480 Mbps.
Note:
Document #: 38-08039 Rev. *C
1.
• DSL modems
• ATA interface
• Memory card readers
• Legacy conversion devices
• Home PNA
• Wireless LAN
• MP3 players
• Networking
• Full speed, with a signaling bit rate of 12 Mbps.
115-KBaud operation is also possible by programming the 8051 SMOD0 or SMOD1 bits to a “1” for UART0 and/or UART1, respectively.
USB Signaling Speed
Functional Description
Applications
Functional Overview
(CY7C64713/4) is a full-speed highly
Figure 4-1. Crystal Configuration
12 pF
C1
20 × PLL
24 MHz
4.2
The 8051 microprocessor embedded in the FX1 family has
256 bytes of register RAM, an expanded interrupt system,
three timer/counters, and two USARTs.
4.2.1
FX1 has an on-chip oscillator circuit that uses an external 24-
MHz (±100 ppm) crystal with the following characteristics:
An on-chip PLL multiplies the 24-MHz oscillator up to 480
MHz, as required by the transceiver/PHY, and internal
counters divide it down for use as the 8051 clock. The default
8051 clock frequency is 12 MHz. The clock frequency of the
8051 can be changed by the 8051 through the CPUCS
register, dynamically.
The CLKOUT pin, which can be three-stated and inverted
using internal control bits, outputs the 50% duty cycle 8051
clock, at the selected 8051 clock frequency—48, 24, or 12
MHz.
4.2.2
FX1 contains two standard 8051 USARTs, addressed via
Special Function Register (SFR) bits. The USART interface
pins are available on separate I/O pins, and are not multi-
plexed with port pins.
UART0 and UART1 can operate using an internal clock at 230
KBaud with no more than 1% baud rate error. 230-KBaud
operation is achieved by an internally derived clock source that
generates overflow pulses at the appropriate time. The
internal clock adjusts for the 8051 clock rate (48, 24, 12 MHz)
such that it always presents the correct frequency for 230-
KBaud operation.
4.2.3
Certain 8051 SFR addresses are populated to provide fast
access to critical FX1 functions. These SFR additions are
shown in Table 4-1. Bold type indicates non-standard,
enhanced 8051 registers. The two SFR rows that end with “0”
and “8” contain bit-addressable registers. The four I/O ports
A–D use the SFR addresses used in the standard 8051 for
ports 0–3, which are not implemented in FX1. Because of the
faster and more efficient SFR addressing, the FX1 I/O ports
are not addressable in external RAM space (using the MOVX
instruction).
• Parallel resonant
• Fundamental mode
• 500- W drive level
• 12-pF (5% tolerance) load capacitors.
12 pF
C2
8051 Microprocessor
8051 Clock Frequency
USARTS
Special Function Registers
12-pF capacitor values assumes a trace
capacitance of 3 pF per side on a four-layer FR4 PCA
[1]
CY7C64713/14
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