CY8C20446-24LQXIT Cypress Semiconductor Corp, CY8C20446-24LQXIT Datasheet - Page 14
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CY8C20446-24LQXIT
Manufacturer Part Number
CY8C20446-24LQXIT
Description
IC CAPSENSE AP 16K 2048B 32UQFN
Manufacturer
Cypress Semiconductor Corp
Series
CapSense® Controllersr
Specifications of CY8C20446-24LQXIT
Applications
Capacitive Sensing
Core Processor
M8C
Program Memory Type
FLASH (16 kB)
Controller Series
CY8C20xx6
Ram Size
2K x 8
Interface
I²C, SPI
Number Of I /o
28
Voltage - Supply
1.71 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
32-UQFN Exposed Pad, 32-HUQFN, 32-SQFN
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Technology
CMOS
Processing Unit
Microprocessor
Operating Supply Voltage (min)
1.71V
Operating Supply Voltage (typ)
1.8/2.5/3.3/5V
Operating Supply Voltage (max)
5.5V
Package Type
QFN EP
Screening Level
Industrial
Pin Count
32
Mounting
Surface Mount
Rad Hardened
No
Processor Series
CY8C20x46
Core
M8C
Development Tools By Supplier
CY3280-20X66
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Compliant, Lead free / RoHS Compliant
48-Pin QFN OCD
The 48-pin QFN part is for the CY8C20066 On-Chip Debug (OCD) PSoC device. Note that this part is only used for in-circuit
debugging.
Table 8. Pin Definitions - CY8C20066 PSoC Device
Note
Document Number: 001-12696 Rev. *D
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
LEGEND A = Analog, I = Input, O = Output, NC = No Connection H = 5 mA High Output Drive, R = Regulated Output.
4. This part is available in limited quantities for In-Circuit Debugging during prototype development. It is not available in production volumes.
Pin
No.
IOHR
IOHR
IOHR
IOHR
IOHR
IOHR
IOHR
IOHR
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
Power
Power
Input
[4]
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
OCDOE
P2[7]
P2[5]
P2[3]
P2[1]
P4[3]
P4[1]
P3[7]
P3[5]
P3[3]
P3[1]
P1[7]
P1[5]
CCLK
HCLK
P1[3]
P1[1]
Vss
D+
D-
Vdd
P1[0]
P1[2]
P1[4]
P1[6]
XRES
P3[0]
P3[2]
P3[4]
P3[6]
P4[0]
P4[2]
P2[0]
P2[2]
P2[4]
P2[6]
Name
OCD mode direction pin
Crystal output (XOut)
Crystal input (XIn)
I2C SCL, SPI SS
I2C SDA, SPI MISO
OCD CPU clock output
OCD high speed clock output
SPI CLK.
ISSP CLK
Ground connection
Supply voltage
ISSP DATA
Optional external clock input
(EXTCLK)
Active high external reset with
internal pull down
Description
[1]
(1)
, I2C SCL, SPI MOSI
, I2C SDA, SPI CLK
[2, 3]
37
38
39
40
41
42
43
44
45
46
47
48
CP
AI, I2C SCL, SPI SS, P1[7]
Pin
No.
IOH
IOH
IOH
IOH
IOH
IOH
IOH
IOH
Power
Power
Power
AI, XOut, P2[5]
AI, XIn , P2[3]
AI , P2[1]
AI , P4[3]
AI , P4[1]
AI, P3[7]
AI, P3[5]
AI, P3[3]
AI, P3[1]
A
I
OCDO
I
I
I
I
I
I
I
I
Figure 8. CY8C20066 PSoC Device
, P2[7]
E
CY8C20x36/46/66, CY8C20396
P0[0]
P0[2]
P0[4]
P0[6]
Vdd
OCDO
OCDE
P0[7]
P0[5]
P0[3]
Vss
P0[1]
Vss
Name
10
11
12
1
2
3
4
5
6
7
8
9
Supply voltage
OCD even data IO
OCD odd data output
Integrating input
Ground connection
Center pad must be connected to ground
(Top View)
QFN
Description
36
35
34
33
32
31
30
29
28
27
26
25
P2[6], AI
P2[4], AI
P2[2], AI
P2[0], AI
P4[2], AI
P4[0], AI
P3[6], AI
P3[4], AI
P3[2], AI
P3[0], AI
P1[6], AI
XRES
Page 14 of 34
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