CY8C20396-24LQXIT Cypress Semiconductor Corp, CY8C20396-24LQXIT Datasheet - Page 23

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CY8C20396-24LQXIT

Manufacturer Part Number
CY8C20396-24LQXIT
Description
IC CAPSENSE 19 I/O 16K 24UQFN
Manufacturer
Cypress Semiconductor Corp
Series
CapSense® Controllersr
Datasheet

Specifications of CY8C20396-24LQXIT

Applications
Capacitive Sensing
Core Processor
M8C
Program Memory Type
FLASH (16 kB)
Controller Series
CY8C20xx6
Ram Size
2K x 8
Interface
I²C, SPI, USB
Number Of I /o
19
Voltage - Supply
1.71 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
24-UQFN Exposed Pad, 24-HUQFN
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Technology
CMOS
Processing Unit
Microprocessor
Operating Supply Voltage (min)
1.71V
Operating Supply Voltage (typ)
1.8/2.5/3.3/5V
Operating Supply Voltage (max)
5.5V
Package Type
QFN EP
Screening Level
Industrial
Pin Count
24
Mounting
Surface Mount
Rad Hardened
No
Processor Series
CY8C20x96
Core
M8C
Data Bus Width
8 bit
Mounting Style
SMD/SMT
Development Tools By Supplier
CY3280-20X66
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Compliant, Lead free / RoHS Compliant
Comparator User Module Electrical Specifications
The following table lists the guaranteed maximum and minimum specifications. Unless stated otherwise, the specifications are for the
entire device voltage and temperature operating range: –40°C <= TA <= 85°C, 1.71V <= Vdd <= 5.5V.
Table 21. Comparator User Module Electrical Specifications
ADC Electrical Specifications
Table 22. ADC User Module Electrical Specifications
Note
Document Number: 001-12696 Rev. *E
T
Offset
Current
PSRR
Input
Range
Input
DC Accuracy
5. Monotonicity is not guaranteed.
Symbol
Symbol
COMP
Eoffset
DNL
PSRR
Egain
F
RES
I
S10
C
INL
R
V
ADC
S8
CLK
IN
IN
IN
[5]
Comparator Response Time
Supply voltage >2V
Supply voltage <2V
Input Voltage Range
Input Capacitance
Resolution
8-Bit Sample Rate
10-Bit Sample Rate
Differential Nonlinearity
Integral Nonlinearity
Operating Current
Data Clock
Power Supply Rejection Ration
Gain Error
Input Resistance
Offset Error
PSRR (Vdd>3.0V)
PSRR (2.2 < Vdd < 3.0)
PSRR (2.0 < Vdd < 2.2)
PSRR (Vdd < 2.0)
Description
Description
50 mV overdrive
Average DC current, 50 mV
overdrive
Power Supply Rejection Ratio
Power Supply Rejection Ratio
This gives 72% of maximum
code
Settings 8, 9, or 10
Data Clock set to 6 MHz.
Sample Rate = 0.001/
(2^Resolution/Data clock)
Data Clock set to 6 MHz.
Sample Rate = 0.001/
(2^Resolution/Data clock)
For any configuration
Source is chip’s internal main
oscillator. See device data
sheet for accuracy.
For any resolution
Equivalent switched cap input
resistance for 8-, 9-, or 10-bit
resolution.
For any configuration
Conditions
Conditions
Data-Clock)
1/(500fF*
2.25
Min
Min
Vss
-1
-2
0
8
0
1
Data-Clock)
1/(400fF*
23.4375
CY8C20X36/46/66/96
5.859
Typ
Typ
275
2.5
70
20
80
40
24
30
12
15
0
Data-Clock)
1/(300fF*
Max
Max
100
350
1.5
1.3
+2
dB
dB
dB
dB
30
80
10
+2
90
12
5
5
Page 23 of 39
%FSR
Units
Units
MHz
ksps
ksps
LSB
LSB
Bits
mV
mV
µA
dB
dB
μA
ns
pF
V
V
Ω
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