CY8C20396-24LQXIT Cypress Semiconductor Corp, CY8C20396-24LQXIT Datasheet - Page 26

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CY8C20396-24LQXIT

Manufacturer Part Number
CY8C20396-24LQXIT
Description
IC CAPSENSE 19 I/O 16K 24UQFN
Manufacturer
Cypress Semiconductor Corp
Series
CapSense® Controllersr
Datasheet

Specifications of CY8C20396-24LQXIT

Applications
Capacitive Sensing
Core Processor
M8C
Program Memory Type
FLASH (16 kB)
Controller Series
CY8C20xx6
Ram Size
2K x 8
Interface
I²C, SPI, USB
Number Of I /o
19
Voltage - Supply
1.71 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
24-UQFN Exposed Pad, 24-HUQFN
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Technology
CMOS
Processing Unit
Microprocessor
Operating Supply Voltage (min)
1.71V
Operating Supply Voltage (typ)
1.8/2.5/3.3/5V
Operating Supply Voltage (max)
5.5V
Package Type
QFN EP
Screening Level
Industrial
Pin Count
24
Mounting
Surface Mount
Rad Hardened
No
Processor Series
CY8C20x96
Core
M8C
Data Bus Width
8 bit
Mounting Style
SMD/SMT
Development Tools By Supplier
CY3280-20X66
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Compliant, Lead free / RoHS Compliant
AC General Purpose IO Specifications
The following table lists guaranteed maximum and minimum specifications for the entire voltage and temperature ranges.
Table 26. AC GPIO Specifications
Document Number: 001-12696 Rev. *E
F
TRise23
TRise23L
TRise01
TRise01L
TFall
TFallL
GPIO
Symbol
GPIO Operating Frequency
Rise Time, Strong Mode, Cload = 50 pF
Ports 2 or 3
Rise Time, Strong Mode Low Supply,
Cload = 50 pF, Ports 2 or 3
Rise Time, Strong Mode, Cload = 50 pF
Ports 0 or 1
Rise Time, Strong Mode Low Supply,
Cload = 50 pF, Ports 0 or 1
Fall Time, Strong Mode, Cload = 50 pF
All Ports
Fall Time, Strong Mode Low Supply,
Cload = 50 pF, All Ports
Description
GPIO Pin
Voltage
Output
90%
10%
Figure 12. GPIO Timing Diagram
TRise23
TRise01
TRise23L
TRise01L
Normal Strong Mode Port 0, 1
Vdd = 3.0 to 3.6V, 10% – 90%
Vdd = 1.71 to 3.0V, 10% – 90%
Vdd = 3.0 to 3.6V, 10% – 90%
LDO enabled or disabled
Vdd = 1.71 to 3.0V, 10% – 90%
LDO enabled or disabled
Vdd = 3.0 to 3.6V, 10% – 90%
Vdd = 1.71 to 3.0V, 10% – 90%
Conditions
TFall
TFallL
Min
15
15
10
10
10
10
0
0
CY8C20X36/46/66/96
Typ
1.71V<Vdd<2.4V
2.4V<Vdd<5.5V
12 MHz for
6 MHz for
Max
80
80
50
80
50
70
Page 26 of 39
Units
MHz
ns
ns
ns
ns
ns
ns
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