MPC8560PX833LB Freescale Semiconductor, MPC8560PX833LB Datasheet - Page 6

• Manufacturer Part Number: MPC8560PX833LB
• Description: IC MPU POWERQUICC III 783-FCPBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8560PX833LB

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 833MHz
• Voltage: 1.2V
• Mounting Type: Surface Mount
• Package / Case: 783-FCPBGA
• Family Name: MPC85XX
• Device Core: PowerQUICC III
• Device Core Size: 32b
• Frequency (max): 833MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.2V
• Operating Supply Voltage (max): 1.26V
• Operating Supply Voltage (min): 1.14V
• Operating Temp Range: 0C to 105C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 783
• Package Type: FCBGA
• For Use With: MPC8560ADS-BGA - BOARD APPLICATION DEV 8560
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Lead Free Status / Rohs Status: Not Compliant

Overview
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— Interrupts can be routed to the e500 core’s standard or critical interrupt inputs
— Interrupt summary registers allow fast identification of interrupt source
I
— Two-wire interface
— Multiple master support
— Master or slave I
— On-chip digital filtering rejects spikes on the bus
Boot sequencer
— Optionally loads configuration data from serial ROM at reset via the I
— Can be used to initialize configuration registers and/or memory
— Supports extended I
— Data integrity checked with preamble signature and CRC
Local bus controller (LBC)
— Multiplexed 32-bit address and data operating at up to 166 MHz
— Eight chip selects support eight external slaves
— Up to eight-beat burst transfers
— The 32-, 16-, and 8-bit port sizes are controlled by an on-chip memory controller
— Three protocol engines available on a per chip select basis:
— Parity support
— Default boot ROM chip select with configurable bus width (8-,16-, or 32-bit)
Two three-speed (10/100/1Gb) Ethernet controllers (TSECs)
— Dual IEEE 802.3, 802.3u, 802.3x, 802.3z, 802.3ac, 802.3ab compliant controllers
— Support for different Ethernet physical interfaces:
— Full- and half-duplex support
— Buffer descriptors are backward compatible with MPC8260 and MPC860T 10/100
— 9.6-Kbyte jumbo frame support
— RMON statistics support
— 2-Kbyte internal transmit and receive FIFOs
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C controller
– General purpose chip select machine (GPCM)
– Three user programmable machines (UPMs)
– Dedicated single data rate SDRAM controller
– 10/100/1Gb Mbps IEEE 802.3 GMII
– 10/100 Mbps IEEE 802.3 MII
– 10 Mbps IEEE 802.3 MII
– 1000 Mbps IEEE 802.3z TBI
– 10/100/1Gb Mbps RGMII/RTBI
programming models
MPC8560 Integrated Processor Hardware Specifications, Rev. 5
2
C mode support
2
C addressing mode
2
C interface
Freescale Semiconductor