NG80960JS25 Intel, NG80960JS25 Datasheet - Page 69
![IC MPU I960JS 3V 25MHZ 132-QFP](/photos/6/77/67770/ng80960js25_sml.jpg)
NG80960JS25
Manufacturer Part Number
NG80960JS25
Description
IC MPU I960JS 3V 25MHZ 132-QFP
Manufacturer
Intel
Datasheet
1.NG80960JS25.pdf
(86 pages)
Specifications of NG80960JS25
Rohs Status
RoHS non-compliant
Processor Type
i960
Features
JS suffix, 32-Bit, 16K Cache
Speed
25MHz
Voltage
3V
Mounting Type
Surface Mount
Package / Case
132-QFP
Other names
820348
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Figure 42. Non-Burst Read and Write Transactions Without Wait States, 32-Bit Bus
Bus Functional Waveforms
Figure 42
arbitration sequence.
applied to the device.
operation.
the device.
summarize all possible combinations of bus accesses across 8-, 16-, and 32-bit buses according to
data alignment.
RDYRCV#
WIDTH1:0
through
Figure 51
BLAST#
Figure 53
AD31:0
BE3:0#
CLKIN
DT/R#
ADS#
DEN#
W/R#
D/C#
A3:2
ALE
Figure 47
illustrates the processor ONCE# sequence from the time power is applied to
Figure 49
and
Figure 50
80960JA/JF/JD/JS/JC/JT 3.3 V Embedded 32-Bit Microprocessor
T
Figure 54
ADDR
a
illustrate typical 80960Jx bus transactions.
T
10
d
illustrates the processor reset sequence from the time power is
illustrates the processor reset sequence when the processor is in
D
In
T
also show accesses on 32-bit buses.
r
T
i
Invalid
T
i
T
ADDR
a
T
10
d
T
DATA Out
r
T
i
Table 44
Figure 48
T
i
through
F_JF030A
depicts the bus
Table 46
69
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