A80960HT75SL2GP Intel, A80960HT75SL2GP Datasheet - Page 9

• Manufacturer Part Number: A80960HT75SL2GP
• Description: IC MPU I960HT 3V 75MHZ 168-PGA
• Manufacturer: Intel

Specifications of A80960HT75SL2GP

• Rohs Status: RoHS non-compliant
• Processor Type: i960
• Features: HT suffix, 32-Bit, 16K Cache
• Speed: 75MHz
• Voltage: 3.3V
• Mounting Type: Surface Mount
• Package / Case: 168-PGA
• Other names: 814114

1.0
2.0
Datasheet
1. The 80960Hx is not “drop-in” compatible in an 80960Cx-based system. Customers may design systems that accept either 80960Hx or Cx
Figure 1. 80960Hx Block Diagram
Table 1. 80960Hx Product Description
processors.
About This Document
This document describes the parametric performance of Intel’s 80960Hx embedded superscalar
microprocessors. Detailed descriptions for functional topics, other than parametric performance,
are published in the i960
In this document, ‘80960Hx’ and ‘i960 Hx processor’ refer to the products described in
Throughout this document, information that is specific to each is clearly indicated.
Intel 80960Hx Processor
The Intel 80960Hx processor provides new performance levels while maintaining backward
compatibility (pin
family of i960 32-bit, RISC-style, embedded processors allows customers to create scalable
designs that meet multiple price and performance points. This is accomplished by providing
processors that may run at the bus speed or faster using Intel’s clock multiplying technology
(see
sophisticated instruction scheduler that allows the processor to sustain a throughput of two
instructions every core clock, with a peak performance of three instructions per clock. The
80960Hx-series comprises three processors, which differ in the ratio of core clock speed to external
bus speed.
† Processor inputs are 5 V tolerant.
Interrupt
Port
80960HD
Table
80960HA
80960HT
Product
1). The 80960Hx core is capable of issuing 150 million instructions per second, using a
Interrupt Controller
Multiply/Divide Unit
Programmable
Execution Unit
JTAG Port
Timers
1
and software) with the i960 CA/CF processor. This newest member of the
Core
1x
2x
3x
®
Hx Microprocessor User’s Guide (272484).
Register-Side
Machine Bus
16 Kbyte, Four-Way Set-Associative
64-bit SRC1 Bus
64-bit SRC2 Bus
64-bit DST Bus
Parallel Instruction Scheduler
Instruction Prefetch Queue
Voltage
3.3 V
3.3 V
3.3 V
Six-Port Register File
128-Bit Cache Bus
Instruction Cache
†
†
†
128-bit Store Bus
128-bit Load Bus
32-bit Base Bus
Memory-Side
Machine Bus
Operating Frequency (bus/core)
25/25, 33/33, 40/40
25/50, 33/66, 40/80
25/75
Memory Region Configuration
8 Kbyte, Four-Way Set-Associative
Register Cache - 5 to 15 sets
Bus Request Queues
Address Generation Unit
Guarded Memory Unit
Data RAM - 2 Kbyte
Bus Controller
Data Cache
80960HA/HD/HT
Table
Control
Address
Data
1.
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