MPC850DSLZQ50BU Freescale Semiconductor, MPC850DSLZQ50BU Datasheet - Page 12

• Manufacturer Part Number: MPC850DSLZQ50BU
• Description: IC MPU PWRQUICC 50MHZ 256-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC850DSLZQ50BU

• Processor Type: MPC8xx PowerQUICC 32-Bit
• Speed: 50MHz
• Voltage: 3.3V
• Mounting Type: Surface Mount
• Package / Case: 256-PBGA
• Family Name: MPC8xx
• Device Core: PowerQUICC
• Device Core Size: 32b
• Frequency (max): 50MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 3.3V
• Operating Supply Voltage (max): 3.465V
• Operating Supply Voltage (min): 3.135V
• Operating Temp Range: 0C to 95C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 256
• Package Type: BGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Lead Free Status / Rohs Status: Not Compliant

Layout Practices
Part VI Bus Signal Timing
Table 6-6 provides the bus operation timing for the MPC850 at 50 MHz, 66 MHz, and 80
MHz. Timing information for other bus speeds can be interpolated by equation using the
MPC850 Electrical Specifications Spreadsheet found at http://www.mot.com/netcomm.
The maximum bus speed supported by the MPC850 is 50 MHz. Higher-speed parts must
be operated in half-speed bus mode (for example, an MPC850 used at 66 MHz must be
configured for a 33 MHz bus).
The timing for the MPC850 bus shown assumes a 50-pF load. This timing can be derated
by 1 ns per 10 pF. Derating calculations can also be performed using the MPC850 Electrical
Specifications Spreadsheet.
12
Num
B1a
B1b
B1d
B1e
B1g
B1h
B7a
B1c
B1f
B1
B2
B3
B4
B5
B7
CLKOUT period
EXTCLK to CLKOUT phase
skew (EXTCLK > 15 MHz and
MF <= 2)
EXTCLK to CLKOUT phase
skew (EXTCLK > 10 MHz and
MF < 10)
CLKOUT phase jitter (EXTCLK
> 15 MHz and MF <= 2)
CLKOUT phase jitter
CLKOUT frequency jitter (MF <
10)
CLKOUT frequency jitter (10 <
MF < 500)
CLKOUT frequency jitter (MF >
500)
Frequency jitter on EXTCLK
CLKOUT pulse width low
CLKOUT width high
CLKOUT rise time
CLKOUT fall time
CLKOUT to A[6–31],
RD/WR, BURST, D[0–31],
DP[0–3] invalid
CLKOUT to TSIZ[0–1], REG,
RSV, AT[0–3], BDIP, PTR invalid
2
2
Characteristic
2
2
Freescale Semiconductor, Inc.
MPC850 (Rev. A/B/C) Hardware Specifications
For More Information On This Product,
2
Table 6-6. Bus Operation Timing
3
-0.90
-2.30
-0.60
-2.00
8.00
8.00
5.00
5.00
Min
Go to: www.freescale.com
20
—
—
—
—
—
—
50 MHz
Max
0.90
2.30
0.60
2.00
0.50
2.00
3.00
0.50
4.00
4.00
—
—
—
—
—
30.30
12.12
12.12
-0.90
-2.30
-0.60
-2.00
7.58
7.58
Min
—
—
—
—
—
—
66 MHz
Max
0.90
2.30
0.60
2.00
0.50
2.00
3.00
0.50
4.00
4.00
—
—
—
—
—
10.00
10.00
-0.90
-2.30
-0.60
-2.00
6.25
6.25
Min
25
—
—
—
—
—
—
80 MHz
Max
0.90
2.30
0.60
2.00
0.50
2.00
3.00
0.50
4.00
4.00
1
—
—
—
—
—
FFACT
0.250
0.250
—
—
—
—
—
—
—
—
—
—
—
—
—
Cap Load
(default
50 pF)
50.00
50.00
50.00
50.00
50.00
50.00
50.00
50.00
50.00
50.00
50.00
50.00
50.00
50.00
—
MOTOROLA
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
%
%
%
%