MPC850DSLZQ50BU Freescale Semiconductor, MPC850DSLZQ50BU Datasheet - Page 15

IC MPU PWRQUICC 50MHZ 256-PBGA

MPC850DSLZQ50BU

Manufacturer Part Number
MPC850DSLZQ50BU
Description
IC MPU PWRQUICC 50MHZ 256-PBGA
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of MPC850DSLZQ50BU

Processor Type
MPC8xx PowerQUICC 32-Bit
Speed
50MHz
Voltage
3.3V
Mounting Type
Surface Mount
Package / Case
256-PBGA
Family Name
MPC8xx
Device Core
PowerQUICC
Device Core Size
32b
Frequency (max)
50MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
3.3V
Operating Supply Voltage (max)
3.465V
Operating Supply Voltage (min)
3.135V
Operating Temp Range
0C to 95C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
256
Package Type
BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Lead Free Status / Rohs Status
Not Compliant

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MOTOROLA
B28b CLKOUT falling edge to CS
B28d CLKOUT falling edge to CS
B29a WE[0–3] negated to D[0–31],
B29b CS negated to D[0–31],
B29d WE[0–3] negated to D[0–31],
B29e CS negated to D[0–31], DP[0–3]
B29g CS negated to D[0–31], DP[0–3]
Num
B28c CLKOUT falling edge to
B29c CS negated to D[0–31], DP[0–3]
B29f
B29
negated GPCM write access
TRLX = 0,1 CSNT = 1, ACS = 10
or ACS = 11, EBDF = 0
WE[0–3] negated GPCM write
access TRLX = 0,1 CSNT = 1
write access TRLX = 0, CSNT =
1, EBDF = 1
negated GPCM write access
TRLX = 0,1 CSNT = 1, ACS = 10
or ACS = 11, EBDF = 1
WE[0–3] negated to D[0–31],
DP[0–3] high-Z GPCM write
access, CSNT = 0
DP[0–3] high-Z GPCM write
access, TRLX = 0 CSNT = 1,
EBDF = 0
DP[0–3], high-Z GPCM write
access, ACS = 00, TRLX = 0 &
CSNT = 0
high-Z GPCM write access,
TRLX = 0, CSNT = 1, ACS = 10
or ACS = 11, EBDF = 0
DP[0–3] high-Z GPCM write
access, TRLX = 1, CSNT = 1,
EBDF = 0
high-Z GPCM write access,
TRLX = 1, CSNT = 1, ACS = 10
or ACS = 11, EBDF = 0
WE[0–3] negated to D[0–31],
DP[0–3] high-Z GPCM write
access TRLX = 0, CSNT = 1,
EBDF = 1
high-Z GPCM write access
TRLX = 0, CSNT = 1, ACS = 10
or ACS = 11, EBDF = 1
Characteristic
Table 6-6. Bus Operation Timing
Freescale Semiconductor, Inc.
MPC850 (Rev. A/B/C) Hardware Specifications
For More Information On This Product,
28.00
28.00
7.00
3.00
8.00
3.00
8.00
5.00
5.00
Min
Go to: www.freescale.com
50 MHz
12.00
14.00 11.00 18.00
14.00
Max
13.00
13.00
43.00
43.00
6.00
6.00
9.00
9.00
Min
66 MHz
14.00
18.00
Max
1
11.00
11.00
36.00
36.00
9.00
4.00
4.00
7.00
7.00
Min
80 MHz
(continued)
13.00
16.00
16.00
Max
FFACT
0.250
0.375
0.375
0.250
0.500
0.250
0.500
1.500
1.500
0.375
0.375
Layout Practices
Cap Load
(default
50 pF)
50.00
50.00
50.00
50.00
50.00
50.00
50.00
50.00
50.00
50.00
50.00
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
15

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