MC68030RC33C Freescale Semiconductor, MC68030RC33C Datasheet - Page 407

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MC68030RC33C

Manufacturer Part Number
MC68030RC33C
Description
IC MPU 32BIT ENHANCED 128-PGA
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68030RC33C

Processor Type
M680x0 32-Bit
Speed
33MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
128-PGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-

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10
10-20
10.2.3.1 COPROCESSOR INTERNAL STATE FRAMES.
10.2.3 Coprocessor Save and Restore Instructions
sor state frame between memory and a coprocessor. This internal copro-
cessor state frame represents the state of coprocessor operations. Using the
cpSAVE and cpRESTORE instructions, it is possible to interrupt coprocessor
coprocessor operations with a new context.
A cpSAVE instruction stores a coprocessor's internal state frame as a se-
frame to descending memory addresses, beginning with the address spec-
the false condition indicator, the main processor executes the next instruction
The coprocessor context save and context restore instruction categories in
the M68000 coprocessor interface support multitasking programming envi-
coprocessor. That is, the coprocessor may be interrupted at any point in the
execution of an instruction in the general or conditional category to begin
context change operations.
save and context restore instruction categories do not use the coprocessor
cessor interface communicates status information to the main processor
during the execution of these instructions. These coprocessor format codes
are discussed in detail in 10.2.3.2 COPROCESSOR FORMAT WORDS.
and context restore (cpRESTORE) instructions transfer an internal coproces-
operation, save the context associated with the current operation, and initiate
quence of long-word entries in memory. Figure 10-14 shows the format of a
coprocessor state frame. During execution of the cpSAVE instruction, the
operation word of the instruction and stores a format word at this effective
address. The processor writes the long words that form the coprocessor state
ascending addresses, beginning with the effective address specified in the
instruction operation word.
ronments. In a multitasking environment, the context of a coprocessor may
need to be changed asynchronously with respect to the operation of that
In contrast to the general and conditional instruction categories, the context
response primitives. A set of format codes defined by the M68000 copro-
MC68030 calculates the state frame effective address from information in the
ified by the sum of the effective address and the format word-length field
multiplied by four. During execution of the cpRESTORE instruction, the
MC68030 reads the format word and long words in the state frame from
(refer to 10.5.2.4 cpTRAPcc INSTRUCTION TRAPS). If the coprocessor returns
in the instruction stream.
MC68030 USER'S MANUAL
The context save (cpSAVE)
MOTOROLA

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