MPC8572EPXAVND Freescale Semiconductor, MPC8572EPXAVND Datasheet - Page 78

• Manufacturer Part Number: MPC8572EPXAVND
• Description: MPU POWERQUICC III 1023-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8572EPXAVND

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 1.5GHz
• Voltage: 1.1V
• Mounting Type: Surface Mount
• Package / Case: 1023-FCPBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -

High-Speed Serial Interfaces (HSSI)
Figure 49
Because LVDS clock driver’s common mode voltage is higher than the MPC8572E SerDes reference
clock input’s allowed range (100 to 400mV), AC-coupled connection scheme must be used. It assumes the
LVDS output driver features 50-Ω termination resistor. It also assumes that the LVDS transmitter
establishes its own common mode level without relying on the receiver or other external component.
Figure 50
Because LVPECL driver’s DC levels (both common mode voltages and output swing) are incompatible
with MPC8572E SerDes reference clock input’s DC requirement, AC-coupling must be used.
assumes that the LVPECL clock driver’s output impedance is 50Ω. R1 is used to DC-bias the LVPECL
outputs prior to AC-coupling. Its value could be ranged from 140Ω to 240Ω depending on clock driver
vendor’s requirement. R2 is used together with the SerDes reference clock receiver’s 50-Ω termination
resistor to attenuate the LVPECL output’s differential peak level such that it meets the MPC8572E SerDes
reference clock’s differential input amplitude requirement (between 200mV and 800mV differential peak).
For example, if the LVPECL output’s differential peak is 900mV and the desired SerDes reference clock
input amplitude is selected as 600mV, the attenuation factor is 0.67, which requires R2 = 25Ω. Consult
78
LVDS CLK Driver Chip
Clock Driver
Clock Driver
Figure 49. AC-Coupled Differential Connection with LVDS Clock Driver (Reference Only)
shows the SerDes reference clock connection reference circuits for LVPECL type clock driver.
shows the SerDes reference clock connection reference circuits for LVDS type clock driver.
CLK_Out
CLK_Out
MPC8572E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 5
10 nF
10 nF
100 Ω differential PWB trace
SD n _REF_CLK
SD n _REF_CLK
50 Ω
50 Ω
Freescale Semiconductor
MPC8572E
SerDes Refer.
CLK Receiver
Figure 50