GCIXP1240AC Intel, GCIXP1240AC Datasheet - Page 17

• Manufacturer Part Number: GCIXP1240AC
• Description: IC MPU NETWORK 232MHZ 432-BGA
• Manufacturer: Intel

Specifications of GCIXP1240AC

• Rohs Status: RoHS non-compliant
• Processor Type: Network
• Features: 32-bit StrongARM RISC Core
• Speed: 232MHz
• Voltage: 3.3V
• Mounting Type: Surface Mount
• Package / Case: 432-BGA
• Mounting: Surface Mount
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Lead Free Status / Rohs Status: Not Compliant
• Other names: 837152

2.5.3
Datasheet
Table 5. SDRAM CRC Types
SDRAM Cyclic Redundancy Checking (CRC)
SDRAM Cyclic Redundancy Checking (CRC) is used to protect blocks of data called Frames.
Using this technique, the transmitter appends an extra n-bit sequence (called a Frame Check
Sequence or FCS) to every frame. The FCS holds redundant information about the frame that helps
the transmitter detect errors in the frame.
The CRC is one of the most used techniques for error detection in data communications. The
technique combines three advantages:
CRC generation is performed in the SDRAM unit and is controlled by Microengine instructions.
All CRC checking and appending is also handled by the Microengines.
The CRC types supported are described in
CRC-32
CRC-16
CRC-10
•
•
•
•
CRC Type
Accesses from the Microengines.
Extreme error detection capabilities
Minimal overhead
Ease of implementation
— Read accesses using the Prefetch Memory address space allow the SDRAM Unit to
— The sdram microinstruction defines the number of 64-bit accesses to make, with up to 16
— Only quadword accesses are supported. Less than 8 bytes can be written when using the
prefetch quadword data to be supplied to the AMBA Bus using 32-bit burst cycles.
quadwords with one instruction.
byte mask within an instruction, but result in Read-Modify-Write cycles.
X
+X
X
x
10
32
16
7
+x
+X
+X
+X
9
26
12
5
+x
+X
+X
+X
5
4
+x
23
5
+X
+1
+X
4
+x+1
2
+X+1
Polynomial
22
+X
16
Table
+X
12
+X
5.
11
+X
10
Intel
+X
8
®
IXP1240 Network Processor
ATM AAL5
Ethernet
HDLC
Frame Relay
ATM OAM
Application
MSB first
LSB first
LSB first
LSB first
MSB first,
LW (or LW +1)
Bit Order
17