GCIXP1240AC Intel, GCIXP1240AC Datasheet - Page 20

• Manufacturer Part Number: GCIXP1240AC
• Description: IC MPU NETWORK 232MHZ 432-BGA
• Manufacturer: Intel

Specifications of GCIXP1240AC

• Rohs Status: RoHS non-compliant
• Processor Type: Network
• Features: 32-bit StrongARM RISC Core
• Speed: 232MHz
• Voltage: 3.3V
• Mounting Type: Surface Mount
• Package / Case: 432-BGA
• Mounting: Surface Mount
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Lead Free Status / Rohs Status: Not Compliant
• Other names: 837152

Intel
2.5.5.1
2.5.5.2
2.5.5.3
20
Table 7.
Table 8.
®
IXP1240 Network Processor
Note: Other SSRAM devices, including single cycle deselect, are not supported.
core clock tick (twice the SCLK frequency). When the state counter reaches the RDY_L Pause
State Value, it will remain in that state until the HIGH_EN_L pin is sampled LOW, allowing the
state counter to resume its decrement operation. The HIGH_EN_L must be driven for at least two
SCLK periods to be sampled properly by the IXP1240.
The RDY_L Pause State must also occur at a minimum of 5 core clock periods prior to the SRWD
state to be recognized. A RDY_L Pause State value of SRWD+5 (Decimal 10, Hexidecimal A) is
used in this example.
In this example, 6 additional core clock “wait-states” are inserted. If the RDY_L input is
synchronous to SCLK and it meets the specified setup and hold times, the resulting number of wait
states will be predictable. However, if the RDY_L input is asynchronous to SCLK, the number of
wait-states the IXP1240 inserts could vary by +/- 2 core clock periods.
SRAM Types Supported
Pipeline Burst DCD (double cycle deselect) type: tKQmax=4.2 ns, 3.3 V.
Flowthru type: tKQmax= 9 ns, 3.3 V.
SRAM Configurations
SRAM Configurations
BootROM Configurations
BootROM x32 Sample Configurations
8 Mbytes (maximum)
Total Memory
Total Memory
512 Kbytes
1 Mbytes
2 Mbytes
2 Mbytes
4 Mbytes
4 Mbytes
2 Mbytes
4 Mbytes
6 Mbytes
8 Mbytes
Number of Chips
Number of Chips
(Maximum of 8)
(Maximum of 8)
8
8
8
8
8
2
8
8
6
8
8
Size of Boot ROM
Size of SRAM
1 Mbit
2 Mbit
2 Mbit
4 Mbit
4 Mbit
8 Mbit
2 Mbit
2 Mbit
4 Mbit
8 Mbit
8 Mbit
Device Organization
Device Organization
128 K x 16-bit
128 K x 32-bit
256 K x 16-bit
256 K x 32-bit
128 K x 16-bit
128 K x 16-bit
256 K x 16-bit
512 K x 16-bit
512 K x 16-bit
32 K x 32-bit
64 K x 32-bit
Datasheet