FWIXP420BB Intel, FWIXP420BB Datasheet - Page 39
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FWIXP420BB
Manufacturer Part Number
FWIXP420BB
Description
IC NETWRK PROCESSR 266MHZ 492BGA
Manufacturer
Intel
Specifications of FWIXP420BB
Processor Type
Network
Features
XScale Core
Speed
266MHz
Voltage
1.3V
Mounting Type
Surface Mount
Package / Case
492-BGA
Core Operating Frequency
266MHz
Package Type
BGA
Pin Count
492
Mounting
Surface Mount
Operating Temperature (max)
70C
Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
852278
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
FWIXP420BB
Manufacturer:
MICRON
Quantity:
2 198
Part Number:
FWIXP420BB
Manufacturer:
INTEL
Quantity:
20 000
Datasheet
Table 12.
Power
Table 13.
UART Interfaces
USB Interface
RXDATA0
TXDATA0
CTS0_N
RTS0_N
RXDATA1
TXDATA1
CTS1_N
RTS1_N
†
USB_DPOS
USB_DNEG
†
Name
For a legend of the Type codes, see
For a legend of the Type codes, see
Name
Reset
Power
On
H
H
H
H
Z
Z
Z
Z
†
Reset
Power
On
Z
Z
Reset
VO/PE
VO/PE
VI/PE
VI/PE
Intel
VO
VO
VI
VI
†
Reset
†
®
Z
Z
Type
IXP42X Product Line and IXC1100 Control Plane Processor
Table 4 on page
Table 4 on page
†
O
O
O
O
I
I
I
I
†
Type
I/O
I/O
UART serial data input to High-Speed UART Pins.
Should be pulled low through a 10-KΩ resistor when not being utilized in the
system.
UART serial data output. The TXD signal is set to the MARKING (logic 1) state
upon a reset operation. High-Speed Serial UART Pins.
UART CLEAR-TO-SEND input to High-Speed UART Pins.
When logic 0, this pin indicates that the modem or data set connected to the
UART interface of the processor is ready to exchange data. The CTS_N signal is
a modem status input whose condition can be tested by the processor.
Should be pulled high through a 10-KΩ resistor when not being utilized in the
system.
UART REQUEST-TO-SEND output:
When logic 0, this informs the modem or the data set connected to the UART
interface of the processor that the UART is ready to exchange data. A reset sets
the request to send signal to logic 1.
LOOP-mode operation holds this signal in its inactive state (logic 1). High-Speed
UART Pins.
UART serial data input.
Should be pulled low through a 10-KΩ resistor when not being utilized in the
system.
UART serial data output. The TXD signal is set to the MARKING (logic 1) state
upon a Reset operation. Console UART Pins.
UART CLEAR-TO-SEND input to Console UART pins.
When logic 0, this pin indicates that the modem or data set connected to the
UART interface of the processor is ready to exchange data. The CTS_N signal is
a modem status input whose condition can be tested by the processor.
Should be pulled high through a 10-KΩ resistor when not being utilized in the
system.
UART REQUEST-TO-SEND output:
When logic 0, this informs the modem or the data set connected to the UART
interface of the processor that the UART is ready to exchange data. A reset sets
the request to send signal to logic 1.
LOOP-mode operation holds this signal in its inactive state (logic 1). Console
UART Pins.
†
Positive signal of the differential USB receiver/driver.
Negative signal of the differential USB receiver/driver.
30.
30.
Functional Signal Descriptions
Description
Description
39