CS42528-CQZ Cirrus Logic Inc, CS42528-CQZ Datasheet - Page 63

• Manufacturer Part Number: CS42528-CQZ
• Description: IC CODEC S/PDIF RCVR 64LQFP
• Manufacturer: Cirrus Logic Inc
• Type: General Purposer

Specifications of CS42528-CQZ

• Package / Case: 64-LQFP
• Data Interface: Serial
• Resolution (bits): 24 b
• Number Of Adcs / Dacs: 2 / 8
• Sigma Delta: Yes
• Dynamic Range, Adcs / Dacs (db) Typ: 114 / 114
• Voltage - Supply, Analog: 4.75 V ~ 5.25 V
• Voltage - Supply, Digital: 3.13 V ~ 5.25 V
• Operating Temperature: -10°C ~ 70°C
• Mounting Type: Surface Mount
• Number Of Adc Inputs: 2
• Number Of Dac Outputs: 8
• Conversion Rate: 192 KSPS
• Interface Type: Serial (SPI)
• Resolution: 24 bit
• Operating Supply Voltage: 3.3 V, 5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 10 C
• Number Of Channels: 2 ADC/8 DAC
• Thd Plus Noise: - 100 dB ADC / - 100 dB DAC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1503 - BOARD EVAL FOR CS42528/CS49300
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 598-1038

DS586F1
6.19
6.19.1 TXP MULTIPLEXER (TMUXX)
6.19.2 RECEIVER MULTIPLEXER (RMUXX)
6.20
For all bits in this register, a “1” means the associated interrupt condition has occurred at least once since the reg-
ister was last read. A ”0” means the associated interrupt condition has NOT occurred since the last reading of the
register. Reading the register resets all bits to 0. Status bits that are masked off in the associated mask register will
always be “0” in this register.
Reserved
UNLOCK
7
7
Receiver Mode Control 2 (address 1Fh)
Interrupt Status (address 20h) (Read Only)
Default = 000
Function:
Selects which of the eight receiver inputs will be mapped directly to the TXP output pin.
Default = 000
Function:
Selects which of the eight receiver inputs will be mapped to the internal receiver.
Reserved
TMUX2
6
6
RMUX2
TMUX2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
TMUX1
QCH
5
5
RMUX1
TMUX1
Table 19. Receiver Input Selection
Table 18. TXP Output Selection
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
TMUX0
DETC
4
4
RMUX0
TMUX0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Reserved
DETU
3
3
Output from pin RXP0
Output from pin RXP1
Output from pin RXP2
Output from pin RXP3
Output from pin RXP4
Output from pin RXP5
Output from pin RXP6
Output from pin RXP7
Input from pin RXP0
Input from pin RXP1
Input from pin RXP2
Input from pin RXP3
Input from pin RXP4
Input from pin RXP5
Input from pin RXP6
Input from pin RXP7
Description
Description
Reserved
RMUX2
2
2
OverFlow
RMUX1
1
1
CS42528
RMUX0
RERR
0
0
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