EMC1001-1-AFZQ-TR SMSC, EMC1001-1-AFZQ-TR Datasheet - Page 13

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EMC1001-1-AFZQ-TR

Manufacturer Part Number
EMC1001-1-AFZQ-TR
Description
Board Mount Temperature Sensors SMBus Temp Snsr
Manufacturer
SMSC
Datasheet

Specifications of EMC1001-1-AFZQ-TR

Lead Free Status / Rohs Status
Lead free / RoHS Compliant
1.5°C SMBus Temperature Sensor in Miniature SOT-23
Datasheet
SMSC EMC1001
4.7
4.8
7
6
5
4
3
2
1
0
BIT
Busy
THIGH
TLOW
THRM
Note 4.3
At device power-up, the default values are stored in all registers. A power-on-reset is initiated when
power is first applied to the part and the V
registers will return 00h and writes to undefined registers will be ignored.
The EMC1001 uses an interlock mechanism that locks the low byte value when the high byte register
is read. This prevents updates to the low byte register between high byte and low byte reads. This
interlock mechanism requires that the high byte register always be read prior to reading the low byte
register.
The status register is a read only register that stores the operational status of the part. When either
TLOW or THIGH are set (TA ≤ low limit or TA > high limit) and the
the
function.
Bit 7 indicates that the ADC is busy converting a value. Bits 6 and 5 indicate that the temperature
measurement is above or below the limits respectively. Bit 0 indicates that the measured temperature
has exceeded the THERM limit. When bit 0 goes high the
Each bit is cleared individually when the status register is read, provided that the error condition for
that bit no longer exists. The
responded with an alert response address (ARA=0001 100). The
if the status register has not been cleared.
The configuration register controls the functionality of the temperature measurements.
Status Register
Configuration Register
NAME
ALERT
/
THERM2
Revision number may change. Please obtain the latest version of this document from the
SMSC web site.
1 when ADC is converting
1 when Temperature High Limit is exceeded
1 when Temperature Low Limit is exceeded
Reserved
Reserved
Reserved
Reserved
1 when THERM limit is exceeded
pin will assert.
Table 4.4 Status Register
ALERT
STATUS REGISTER
DATASHEET
/
THERM2
See
DD
13
Section 4.3 on page 11
supply exceeds the POR threshold. Reads of undefined
output is latched and will not be reset until the host has
FUNCTION
ADDR
/
THERM
ALERT
ALERT
for more details on the ALERT
/
THERM2
/
output will be asserted.
THERM2
Revision 1.6 (01-29-07)
output will not reset
pin is not masked,

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