EMC1428-1-AP-TR SMSC, EMC1428-1-AP-TR Datasheet - Page 42

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EMC1428-1-AP-TR

Manufacturer Part Number
EMC1428-1-AP-TR
Description
Board Mount Temperature Sensors Octal Temp Sensor
Manufacturer
SMSC
Datasheet

Specifications of EMC1428-1-AP-TR

Lead Free Status / Rohs Status
Lead free / RoHS Compliant
ADDR
37h
Revision 0.69 (06-29-09)
R/W
5.20
R-C
Limit Status
REGISTER
THERM
THERM Limit Status Register
The Low Limit Status Register contains the status bits that are set when a temperature channel drops
below the low limit for a number of consecutive readings as set by the consecutive alert counts (see
Section
from the Low Limit Status Register will clear all bits if the error condition has been removed. Reading
from the register will also clear the LOW status bit in the Status Register.
The ALERT pin will be set if any of these status bits are set.
Bit 7 - E7LOW - This bit is set when the External Diode 7 channel drops below its programmed low
limit.
Bit 6 - E6LOW - This bit is set when the External Diode 6 channel drops below its programmed low
limit.
Bit 5- E5LOW - This bit is set when the External Diode 5 channel drops below its programmed low limit.
Bit 4 - E4LOW - This bit is set when the External Diode 4 channel drops below its programmed low
limit.
Bit 3 - E3LOW - This bit is set when the External Diode 3 channel drops below its programmed low
limit.
Bit 2 - E2LOW - This bit is set when the External Diode 2 channel drops below its programmed low
limit.
Bit 1 - E1LOW - This bit is set when the External Diode 1 channel drops below its programmed low
limit.
Bit 0 - ILOW - This bit is set when the Internal Diode channel drops below its programmed low limit.
The THERM Limit Status Register contains the status bits that are set when a temperature channel
THERM Limit is exceeded for a number of consecutive readings as set by the consecutive therm
counts (see
is set. Reading from the THERM Limit Status Register will not clear the status bits. Once the
temperature drops below the THERM Limit minus the THERM Hysteresis, the corresponding status
bits will be automatically cleared. The THERM bit in the Status Register will be cleared when all
individual channel THERM bits are cleared.
Bit 7 - E7THERM - This bit is set when the External Diode 7 channel meets or exceeds it’s
programmed THERM Limit.
Bit 6 - E6THERM - This bit is set when the External Diode 6 channel meets or exceeds it’s
programmed THERM Limit.
Bit 5 - E5THERM - This bit is set when the External Diode 5 channel meets or exceeds it’s
programmed THERM Limit.
Bit 4 - E4THERM - This bit is set when the External Diode 4 channel meets or exceeds it’s
programmed THERM Limit.
Bit 3 - E3THERM - This bit is set when the External Diode 3 channel meets or exceeds it’s
programmed THERM Limit.
5.14). If any of these bits are set, then the LOW status bit in the Status Register is set. Reading
THERM
B7
Section
E7
5.14). If any of these bits are set, then the THERM status bit in the Status Register
THERM
Table 5.25 THERM Limit Status Register
B6
E6
THERM
1°C Multiple Temperature Sensor with HW Thermal Shutdown & Hottest of Thermal Zones
DATASHEET
B5
E5
42
THERM
B4
E4
THERM
B3
E3
THERM
B2
E2
THERM
B1
E1
SMSC EMC1428
THERM
B0
Datasheet
I
DEFAULT
00h

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