AD1981BJST-REEL Analog Devices Inc, AD1981BJST-REEL Datasheet - Page 24

• Manufacturer Part Number: AD1981BJST-REEL
• Description: IC CODEC STEREO MICPREAMP 48LQFP
• Manufacturer: Analog Devices Inc
• Series: SoundMAX®r
• Type: Audio Codec '97r

Specifications of AD1981BJST-REEL

• Rohs Status: RoHS non-compliant
• Data Interface: Serial
• Resolution (bits): 16, 20 b
• Number Of Adcs / Dacs: 4 / 2
• Sigma Delta: No
• Dynamic Range, Adcs / Dacs (db) Typ: 85 / 90
• Voltage - Supply, Analog: 4.5 V ~ 5.5 V
• Voltage - Supply, Digital: 3 V ~ 3.47 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 48-LQFP
• Single Supply Voltage (typ): 3.3/5V
• Single Supply Voltage (min): 3/4.5V
• Single Supply Voltage (max): 3.47/5.5V
• Package Type: LQFP
• Lead Free Status / Rohs Status: Not Compliant
• Other names: AD1981BJST-REEL; AD1981BJST-REELTR

AD1981B
SPDIF CONTROL REGISTER
Index 0x3A
Reg No.
0x3A
Table 35.
Bit
PRO
AUD
COPY
PRE
CC [6:0]
L
SPSR [1:0]
V
EQ CONTROL REGISTER
Index 0x60
Reg No.
0x60
Table 36.
Bit
BCA [5:0]
exception of V, this register should be written to only when the SPDIF transmitter is disabled (SPDIF bit in Register 0x2A is 0). This ensures that control and status
information start up correctly at the beginning of SPDIF transmission.
is used in conjunction with the EQ data register (0x78) to set up the equalizer coefficients. The reset default disables the equalizer function until the coefficients can be
properly set up by the software and sets the symmetry bit to allow equal coefficients for left and right channels.
All registers are not shown, and bits containing an X are assumed to be reserved.
Register 0x3A is a read/write register that controls SPDIF functionality and manages bit fields propagated as channel status (or subframe in the V case). With the
Register 0x60 is a read/write register that controls the equalizer functionality and data setup. This register contains the biquad and coefficient address pointer, which
Name
EQ Ctrl
Name
SPDIF Control
Mnemonic
Professional
Nonaudio
Copyright
Pre-emphasis
Category Code
Generation Level
SPDIF Transmit
Sample Rate
Validity
Mnemonic
Biquad and Coefficient
Address Pointer
D15
EQM
D15
V
D14
MAD LBEN
D14
X
Function
1 = Professional use of channel status.
0 = Consumer.
1 = Data is non-PCM format.
0 = Data is PCM format.
1 = Copyright is asserted.
0 = Copyright is not asserted.
1 = Filter pre-emphasis is 50 µs/15 µs.
0 = Pre-emphasis is none.
Programmed according to IEC standards, or as appropriate.
Programmed according to IEC standards, or as appropriate.
SPSR [1:0] = 00: Transmit sample rate is 44.1 kHz.
SPSR [1:0] = 01: Reserved.
SPSR [1:0] = 10: Transmit sample rate is 48 kHz (reset default).
SPSR [1:0] = 11: Not supported.
This bit affects the validity flag (Bit 28 transmitted in each SPDIF L/R subframe) and enables the SPDIF
transmitter to maintain connection during error or mute conditions.
V = 1: Each SPDIF subframe (L + R) has Bit 28 set to 1. This tags both samples as invalid.
V = 0: Each SPDIF subframe (L + R) has Bit 28 set to 0 for valid data and 1 for invalid data (error
condition).
When V = 0, asserting the VFORCE bit (D15) in Register 0x2A (Ext’d Audio Stat/Ctrl) forces the validity
flag low, marking both samples as valid.
D13
SPSR1
D13
X
Function
biquad 0 coef a0 BCA[5:0] = 011011
biquad 0 coef a1 BCA[5:0] = 011010
biquad 0 coef a2 BCA[5:0] = 011001
biquad 0 coef b1 BCA[5:0] = 011101
biquad 0 coef b2 BCA[5:0] = 011100
biquad 1 coef a0 BCA[5:0] = 100000
biquad 1 coef a1 BCA[5:0] = 011111
D12
X
D12
SPSR0
D11
X
D11
L
D10
X
D10
CC6
Rev. C | Page 24 of 32
D9
X
D9
CC5
D8
X
D8
CC4
D7
SYM
D7
CC3
D6
CHS
D6
CC2
D5
BCA5
D5
CC1
D4
BCA4
D4
CC0
D3
BCA3
D3
PRE
D2
BCA2
D2
COPY
D1
BCA1
D1
AUD
D0
BCA0
D0
PRO
Default
0x2000
Default
0x8080