AD1819BJSTZ Analog Devices Inc, AD1819BJSTZ Datasheet - Page 17

• Manufacturer Part Number: AD1819BJSTZ
• Description: IC CODEC AUDIO 16BIT 48LQFP
• Manufacturer: Analog Devices Inc
• Type: Audio Codec '97r

Specifications of AD1819BJSTZ

• Data Interface: Serial
• Resolution (bits): 16 b
• Number Of Adcs / Dacs: 2 / 2
• Sigma Delta: Yes
• S/n Ratio, Adcs / Dacs (db) Typ: 90 / 90
• Dynamic Range, Adcs / Dacs (db) Typ: 87 / 90
• Voltage - Supply, Analog: 4.5 V ~ 5.5 V
• Voltage - Supply, Digital: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-LQFP
• Single Supply Voltage (typ): 5V
• Single Supply Voltage (min): 4.5V
• Single Supply Voltage (max): 5.5V
• Package Type: LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Serial Configuration (Index 74h)
DRRQ0
DRRQ1
DRRQ2
DLRQ0
DLRQ1
DLRQ2
DRQEN
REGM0
REGM1
REGM2
SLOT16
Miscellaneous Control Bits (Index 76h)
ARSR
DRSR
SRX8D7
SRX10D7
MODEN
ALSR
DLSR
DACZ
REV. 0
R
N
7
R
N
7
4
e
u
6
e
h
u
g
m
h
g
m
N
S
N
M
r e
a
a
i
m
l a i
c s
m
e
e
C
C
o
o
f n
n
r t
g i
l o
r u
Master AC’97 Codec DAC Right Request.
Slave 1 Codec DAC Right Request.
Slave 2 Codec DAC Right Request.
Master AC’97 Codec DAC Left Request.
Slave 1 Codec DAC Left Request.
Slave 2 Codec DAC Left Request.
Fills idle status slots with DAC request reads, and stuffs DAC requests into LSB of output address slot. (AC-Link
Master Codec Register Mask.
Slave 1 Codec Register Mask.
Slave 2 Codec Register Mask.
Enable 16-Bit Slots.
Multiply SR1 Rate by 8/7.
Multiply SR1 Rate by 10/7. SRX10D7 and SRX8D7 are mutually exclusive; SRX10D7 has priority if both are set.
Modem Filter Enable (left channel only). Change only when DACs are powered down.
ADC Left Sample Generator Select. Connects left ADC channel to SR0 or SR1.
DAC Left Sample Generator Select. Connects left DAC channel to SR0 or SR1.
Zero-Fill (vs. repeat sample) if DAC is starved.
Slot 1.)
If your system uses only a single AD1819B, you can ignore the register mask and the slave 1/slave 2 request bits. If
you write to this register, write ones to all of the register mask bits. The request bits are read-only.
The codec asserts each request bit when the corresponding DAC channel can accept data in the next frame. These
bits are snapshots of the codec state taken when the current frame began (effectively, on the rising edge of SYNC),
but they also take notice of DAC samples sent in the current frame.
If you set the DRQEN bit, the AD1819B will fill all otherwise unused AC-Link status address and data slots with
the contents of register 74h. That makes it somewhat simpler to access the information, because you don’t need to
continually issue AC-Link read commands to get the register contents.
Also, the DAC requests are reflected in Slot 1, Bits (11 . . . 6). These bits are active Lo.
SLOT16 makes all AC-Link slots 16 bits in length, formatted into 16 slots.
ADC Right Sample Generator Select. Connects right ADC channel to SR0 or SR1.
0 = SR0 Selected.
1 = SR1 Selected.
DAC Right Sample Generator Select. Connects right DAC channel to SR0 or SR1.
0 = SR0 Selected.
1 = SR1 Selected.
0 = SR0 Selected.
1 = SR1 Selected.
0 = SR0 Selected.
1 = SR1 Selected.
B
t a
s t i
o i
n
S
D
D
L
D
1
A
O
5 1
6
5 1
C
T
Z
R
D
E
D
X
G
2
4 1
4 1
M
R
D
D
E
X
3 1
1
G
3 1
M
D
R
X
D
E
2 1
G
0
2 1
M
D
D
X
1 1
D
R
N
1 1
Q
E
D
D
L
D
0 1
S
D
L
R
2
0 1
R
Q
D
X
D
–17–
9
D
L
1
R
9
Q
A
D
L
D
S
8
D
L
R
0
R
8
Q
M
D
E
O
N
7
D
D
X
7
S
R
D
D
X
6
7
D
1
X
0
6
S
R
D
D
X
5
7
D
X
8
5
D
X
D
4
X
4
D
X
D
3
X
3
D
D
D
R
D
R
S
2
2
R
R
2
Q
D
D
X
D
R
1
AD1819B
1
R
1
Q
A
D
D
R
D
R
S
0
0
R
R
0
Q
D
0
0
D
7
e
0
0
a f
e
0
0
a f
h
0
u
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