LAN9221-ABZJ SMSC, LAN9221-ABZJ Datasheet - Page 19

• Manufacturer Part Number: LAN9221-ABZJ
• Description: IC ETHERNET CTRLR 16BIT 56-QFN
• Manufacturer: SMSC
• Type: Single Chip MAC and PHY Controllerr

Specifications of LAN9221-ABZJ

• Controller Type: Ethernet Controller, MAC/PHY
• Interface: Serial EEPROM
• Voltage - Supply: 3.3V
• Current - Supply: 85mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 56-QFN
• Product: Ethernet Controllers
• Number Of Transceivers: 1
• Standard Supported: IEEE 802.3 or IEEE 802.3u
• Data Rate: 10 Mbps or 100 Mbps
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 0 V
• Supply Current (max): 99.2 mA, 137.3 mA
• Maximum Operating Temperature: + 70 C
• Ethernet Connection Type: 10BASE-T or 100BASE-TX
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• No. Of Ports: 2
• Ethernet Type: IEEE 802.3 / 802.3u
• Interface Type: HBI
• Supply Current: 85mA
• Supply Voltage Range: 1.62V To 3.6V
• Operating Temperature Range: 0°C To +70°C
• Rohs Compliant: Yes
• For Use With: 638-1074 - EVALUATION BOARD LAN9221-ABZJ
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 638-1073

USB 2.0 to 10/100 Ethernet Controller
Datasheet
SMSC LAN950x Family
NUM PINS
1
1
1
1
1
Indicator LED
VBUS Power
Purpose I/O
Upstream
Ethernet
General
NAME
Detect
Speed
Test 1
Test 2
Test 3
10
VBUS_DET
nSPD_LED
Table 3.4 Miscellaneous Pins (continued)
SYMBOL
GPIO10
TEST1
TEST2
TEST3
DATASHEET
BUFFER
IS/O12/
TYPE
OD12
OD12
IS_5V
(PU)
(PU)
(PD)
19
-
-
-
This pin is driven low (LED on) when the Ethernet
operating speed is 100Mbs, or during auto-
negotiation. This pin is driven high during 10Mbs
operation, or during line isolation.
This General Purpose I/O pin is fully
programmable as either a push-pull output, an
open-drain output, or a Schmitt-triggered input.
Note:
Note:
Detects state of upstream bus power.
For bus powered applications, this pin must be
tied to VDD33IO.
For self powered applications where the device is
permanently attached to a host, VBUS_DET
should be pulled to VDD33IO. For other self
powered applications, refer to the device
reference schematic for additional connection
information.
Note:
This pin must always be connected to VDD33IO
for proper operation.
This pin must always be connected to VSS for
proper operation.
This pin must always be connected to VSS for
proper operation.
(LAN9500A/LAN9500Ai only)
This pin may serve as a wakeup pin
whose detection mode is selectable
when External PHY and PME modes of
operation are in effect. Refer to
Chapter 6, "PME Operation," on
page 40
By default this pin is configured as a
GPIO.
(LAN9500A/LAN9500Ai only)
This pin may be used to signal bus
power availability when PME mode of
operation is in effect. Refer to
Chapter 6, "PME Operation," on
page 40
DESCRIPTION
for additional information.
for additional information.
Revision 1.0 (05-17-10)