TMC2084-HT SMSC, TMC2084-HT Datasheet - Page 48

• Manufacturer Part Number: TMC2084-HT
• Description: IC CTRLR CIRCLINK TM 48-TQFP
• Manufacturer: SMSC
• Series: CircLink™r

Specifications of TMC2084-HT

• Controller Type: I/O Controller
• Interface: Transceiver
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 48-TQFP, 48-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Other names: 638-1025

2.10
2.11
Revision 0.2 (10-23-08)
CMI Coding
TMC2084 supports CMI coding and RZ coding as the coding scheme for media interface.
Features of CMI Coding:
*1
The shared pin nCMIBYP is used to select either the CMI or RZ coding: nCMIBYP = H selects CMI coding;
nCMIBYP = L selects RZ coding.
For detail information on CMI coding, see the data sheet for TMC2072 or TMC2074.
RAM Image On Host Side
The image of on-chip RAM in the host node is shown below. The area labeled as ”I/O-n” shows the packet
data received from each I/O node and the area labeled as ”host ” shows the state of the transmission page
of host node.
I. Page Size configuration: 64 byte/page (PSSL = H)
The following conditions apply:
The CMIERRMD bit is by default configured to "The packet is discarded."
Low DC component
This makes external circuitry to prevent the pulse transformer from magnetic saturation
unnecessary when it is used for isolation in RS485, since in CMI coding the same bit is never
repeated more than two consecutive times.
Limited possible states allows easy self-correction
The self-correction capability of CMI may correct an error caused by jitter or one shot noise. The
CMIECC status bit reports whether the self-correction was made.
The bit CMIERMD that is configured through the network specifies whether the self-corrected
packet is treated as a normally-received packet. Usually it is not a problem to treat it as a normal
packet
bit reports this event. In this case, the received packet should be discarded.
Host node ID = MAXID
*1
Faulty correction made by CMI causes the assertion of CRC check and the RXERR status
1
Figure 8 - State Transition Diagram for CMI
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Standalone Mode CircLink
SMSC TMC2084
TM
Datasheet
Controller