TDA8034HN/C1,118 NXP Semiconductors, TDA8034HN/C1,118 Datasheet - Page 9

no-image

TDA8034HN/C1,118

Manufacturer Part Number
TDA8034HN/C1,118
Description
IC SMARD CARD INTERFACE 24HVQFN
Manufacturer
NXP Semiconductors
Datasheet

Specifications of TDA8034HN/C1,118

Controller Type
Smart Card Interface
Interface
Analog
Voltage - Supply
1.8V, 3V, 5V
Current - Supply
65mA
Operating Temperature
-25°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
24-VQFN Exposed Pad, 24-HVQFN, 24-SQFN, 24-DHVQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
NXP Semiconductors
TDA8034HN
Product data sheet
8.7 Activation sequence
The following device activation sequence is applied when using an external clock; see
Figure
Calculation of the time delays is as follows:
Remark: The value of period T is 64 times the period interval of the internal oscillator at
high frequency (
1. Pin CMDVCCN is pulled LOW (t0).
2. The internal oscillator is triggered (t0).
3. The internal oscillator changes to high frequency (t1).
4. V
5. Pins I/OUC, AUX1UC and AUX2UC are driven HIGH (t3).
6. The clock on pin CLK is applied to the C3 contact (t4).
7. Pin RST is enabled (t5).
Fig 6.
(internal pin)
VCC_SEL1
VCC_SEL2
CMDVCCN
t1 = t0 + 384 ×
t2 = t1
t3 = t1 + 17T / 2
t4 = driven by host controller; > t3 and < t5
t5 = t1 + 23T / 2
CC
PRESN
7:
OFFN
mode
V
rises from either 0 V to 3 V or 0 V to 5 V on a controlled slope (t2).
CC
Shutdown and Deep shutdown mode activation/deactivation
shutdown
All information provided in this document is subject to legal disclaimers.
1
fosc(int)high
1
deactivation
activation
sequence
Rev. 3.0. — 17 January 2011
fosc(int)low
shutdown
); t3 is called t
deep shutdown
d(start)
and t5 is called t
shutdown
TDA8034HN
debounce
d(end)
Smart card interface
.
© NXP B.V. 2011. All rights reserved.
activation
001aal139
9 of 30

Related parts for TDA8034HN/C1,118