PCA9665PW/S911,118 NXP Semiconductors, PCA9665PW/S911,118 Datasheet - Page 38
PCA9665PW/S911,118
Manufacturer Part Number
PCA9665PW/S911,118
Description
IC CNTRLR PARALLEL/I2C 20TSSOP
Manufacturer
NXP Semiconductors
Datasheet
1.PCA9665PWS911118.pdf
(90 pages)
Specifications of PCA9665PW/S911,118
Controller Type
I²C Bus Controller
Interface
I²C
Voltage - Supply
2.3 V ~ 3.6 V
Current - Supply
100µA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
20-TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
935285487118
PCA9665PW/S911-T
PCA9665PW/S911-T
PCA9665PW/S911-T
PCA9665PW/S911-T
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Table 36.
Status
code
(I2CSTA)
08h
10h
38h
48h
Master Receiver Buffered mode (MODE = 1)
Status of the
I
PCA9665
A START condition
has been transmitted
A repeated START
condition has been
transmitted
Arbitration lost in
NACK bit
SLA+R has been
transmitted;
NACK has been
received
2
C-bus and the
Application software response
To/from I2CDAT
Load SLA+R
Load SLA+R or
Load SLA+W and
the data bytes
No I2CDAT action
or
No I2CDAT action X
No I2CDAT action
or
No I2CDAT action
or
No I2CDAT action X
To/from I2CCOUNT
LB BC[6:0]
0
1
0
1
X
X
X
X
Total number of bytes
to be received
Total number of bytes
to be received
Total number of bytes
to be received
Total number of bytes
to be received
Total number of bytes
to be transmitted
(= SLA+W + number
of data bytes)
X
X
X
X
X
To I2CCON
STA STO SI
X
X
X
X
X
0
1
1
0
1
X
X
X
X
X
0
0
0
1
1
0
0
0
0
0
0
0
0
0
0
AA MODE
X
X
X
X
X
X
X
X
X
X
1
1
1
1
1
1
1
1
1
1
Next action taken by the PCA9665
SLA+R will be transmitted.
If ACK bit received, BC[6:0] data bytes will be
received, ACK bit will be returned for all of
them.
SLA+R will be transmitted.
If ACK bit received, BC[6:0] data bytes will be
received, ACK bit will be returned for all of
them, except for the last one where NACK bit
will be returned.
SLA+R will be transmitted.
If ACK bit received, BC[6:0] data bytes will be
received, ACK bit will be returned for all of
them.
SLA+R will be transmitted.
If ACK bit received, BC[6:0] data bytes will be
received, ACK bit will be returned for all of
them, except for the last one where NACK bit
will be returned.
SLA+W will be transmitted;
PCA9665 will be switched to Master
Transmitter Buffered mode.
I
PCA9665 will enter slave mode.
A START condition will be transmitted when
the bus becomes free.
Repeated START condition will be
transmitted.
STOP condition will be transmitted;
STO flag will be reset.
STOP condition followed by a START
condition will be transmitted;
STO flag will be reset.
2
C-bus will be released;
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