DP83905AVQB National Semiconductor, DP83905AVQB Datasheet - Page 48

• Manufacturer Part Number: DP83905AVQB
• Description: IC CONTROLR AT/LAN TP IN 160PQFP
• Manufacturer: National Semiconductor
• Series: AT/LANTIC™r

Specifications of DP83905AVQB

• Controller Type: AT, LAN Twisted-Pair Interface Controller
• Voltage - Supply: 4.75 V ~ 5.25 V
• Current - Supply: 100mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 160-BFQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Interface: -
• Other names: *DP83905AVQB

6 0 Operation of AT LANTIC Controller
FIGURE 33 Received Packet Aborted if it Hits Boundary
Enabling the AT LANTIC Controller on an Active
Network
After the AT LANTIC Controller has been initialized the pro-
cedure for disabling and then re-enabling the AT LANTIC
Controller on the network is similar to handling Receive
Buffer Ring overflow as described previously
10 Put AT LANTIC Controller in START mode (Command
11 Initialize the Transmit Configuration for the intended
End of Packet Operations
At the end of the packet the AT LANTIC Controller deter-
mines whether the received packet is to be accepted or
rejected It either branches to a routine to store the Buffer
Header or to another routine that recovers the buffers used
to store the packet
1 Program Command Register for page 0 (Command
2 Initialize Data Configuration Register (DCR)
3 Clear Remote Byte Count Registers (RBCR0 RBCR1)
4 Initialize Receive Configuration Register (RCR)
5 Place the AT LANTIC Controller in LOOPBACK mode
6 Initialize Receive Buffer Ring
7 Clear Interrupt Status Register (ISR) by writing 0FFH to
8 Initialize Interrupt Mask Register (IMR)
9 Program Command Register for page 1 (Command
Register
tive since the AT LANTIC Controller is in LOOPBACK
value The AT LANTIC Controller is now ready for
transmission and reception
Register
if using Remote DMA
1 or 2 (Transmit Configuration Register
(BNDRY)
(PSTOP)
it
Register
iii) Initialize CURRENT pointer
ii) Initialize Multicast Address Registers (MAR0–
i) Initialize Physical Address Registers (PAR0–PAR5)
MAR7)
e
e
e
Page Start (PSTART)
22H) The local receive DMA is still not ac-
21H)
61H)
Boundary Pointer
and Page Stop
e
02H or 04H)
TL F 11498–30
48
(Continued)
Successful Reception
If the packet is successfully received the DMA is restored
to the first buffer used to store the packet (pointed to by the
Current Page Register) The DMA then stores the Receive
Status a Pointer to where the next packet will be stored
(Buffer 4) and the number of received bytes Note that the
remaining bytes in the last buffer are discarded and recep-
tion of the next packet begins on the next empty 256-byte
buffer boundary The Current Page Register is then initial-
ized to the next available buffer in the Buffer Ring (The
location of the next buffer had been previously calculated
and temporarily stored in an internal scratchpad register )
Buffer Recovery for Rejected Packets
If the packet is a runt packet or contains CRC or Frame
Alignment errors it is rejected The buffer management log-
ic resets the DMA back to the first buffer page used to store
the packet (pointed to by CURR) recovering all buffers that
had been used to store the rejected packet This operation
will not be performed if the AT LANTIC Controller is pro-
grammed to accept either runt packets or packets with CRC
or Frame Alignment errors The received CRC is always
stored in buffer memory after the last byte of received data
for the packet
FIGURE 34 Termination of Received
FIGURE 35 Termination of Receive
Packet Packet Accepted
Packet Packet Reject
TL F 11498 – 31
TL F 11498 – 32