E-STE100P STMicroelectronics, E-STE100P Datasheet - Page 8

IC TRANSCEIVER 3.3V 64 TQFP

E-STE100P

Manufacturer Part Number
E-STE100P
Description
IC TRANSCEIVER 3.3V 64 TQFP
Manufacturer
STMicroelectronics
Type
Transceiverr
Datasheet

Specifications of E-STE100P

Number Of Drivers/receivers
1/1
Protocol
MII
Voltage - Supply
3.15 V ~ 3.45 V
Mounting Type
Surface Mount
Package / Case
64-TQFP, 64-VQFP
Number Of Receivers
1
Data Rate
10/100Mbps
Operating Supply Voltage (typ)
3.3V
Package Type
TQFP
Operating Temperature Classification
Industrial
Operating Supply Voltage (max)
3.45V
Operating Supply Voltage (min)
3.15V
Mounting
Surface Mount
Pin Count
64
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-2143
STE100P

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
E-STE100P
Manufacturer:
ST
Quantity:
310
Part Number:
E-STE100P
Manufacturer:
STMicroelectronics
Quantity:
10 000
Part Number:
E-STE100P
Manufacturer:
ST
0
STE100P
6
There are 11 registers with 16 bits each supported for the STE100P. These include 7 basic registers which
are defined according to the clause 22 “Reconciliation Sublayer and Media Independent Interface” and
clause 28 “Physical Layer link signaling for 10 Mb/s and 100 Mb/s Auto-Negotiation on twisted pair” of
IEEE802.3u standard.
In addition, there are 4 special registers for advanced chip control and status information.
6.1
Table 4. Register List
6.2
Table 5. Register Descriptions
8/31
PR0- XCR, XCVR Control Register. The default values on power-up/reset are as listed below.
Address
Bit #
REGISTERS AND DESCRIPTORS DESCRIPTION
15
14
13
12
Register List
Register Descriptions
17
18
19
20
0
1
2
3
4
5
6
XLBEN
SPSEL
Name
ANEN
XRST
Reg. Index
PR17
PR18
PR19
PR20
PR0
PR1
PR2
PR3
PR4
PR5
PR6
Reset control.
1: Device will be reset. This bit will be cleared by STE100P
itself after the reset is completed.
Loop-back mode select.
1: Loop-back mode is selected.
0: Normal mode
Network Speed select. This bit’s selection will be ignored if
Auto-Negotiation is enabled(bit 12 of PR0 = 1).
1:100Mbps is selected.
0:10Mbps is selected.
Auto-Negotiation ability control.
1: Auto-Negotiation function is enabled.
0: Auto-Negotiation is disabled.
100CTR
ANLPA
Name
XCIIS
PID1
PID2
XMC
XCR
XSR
ANA
ANE
XIE
XCVR Control Register
XCVR Status Register
PHY Identifier 1
PHY Identifier 2
Auto-Negotiation Advertisement Register
Auto-Negotiation Link Partner Ability Register
Auto-Negotiation Expansion Register
XCVR Configuration Information and Interrupt Status Register
XCVR Interrupt Enable Register
100Base-TX PHY Control/Status Register
XCVR Mode Control Register
Descriptions
Register Descriptions
Default Val
0
0
1
1
RW Type
R/W
R/W
R/W
R/W

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